NOC Design Verification Sr Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

I korthet

As a Sr. Engineer in NOC Design Verification, you will be responsible for creating state-of-the-art UVM-based verification test benches and methodologies to verify complex IPs and sub-systems. This role requires defining test plans, tests, and verification infrastructure, and implementing functional coverage for verification closure. Collaboration with architects and design teams is essential for ensuring verification completeness.

Ansvarsområden

Create "State of the art" UVM based verification test benches and methodologies to verify complex IP’s and Sub-Systems.
Define test plans, tests and verification infrastructure for modules, IPs and sub-systems.
Build efficient and reusable bus functional models, monitors, checkers and scoreboards.
Implement Functional coverage and own verification closure.
Work with architects, design teams for verification completeness.

Krav

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
3+ Years of experience in Design Verification.

Önskade kvalifikationer

Exposure to Power Aware Verification will be a plus.

Förmåner

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Färdigheter

UVMVerilogSystemVerilog

#NOC#ASICS#Hardware Engineering#Design Verification#UVM#Test Benches#IP Verification#Sub-Systems Verification#Power Aware Verification#Functional Coverage