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LPASS Design Verification Sr Lead Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling

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I korthet

Qualcomm India Private Limited is seeking an LPASS Design Verification Sr Lead Engineer in Bangalore, India. This role involves ownership of features in the Low Power Audio Subsystem (LPASS) core, developing testbenches, and exploring innovative DV methodologies to ensure bug-free silicon for Snapdragon devices.

Ansvarsområden

  • DV ownership of one or more features in the Low power audio subsystem (LPASS) core
  • Developing a robust testbench, optimized for the specific feature/DUT
  • Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements
  • Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices

Krav

  • Minimum 1 - 2 years of VLSI industry experience
  • Strong debugging and analytical skills
  • Strong knowledge of HDLs like Verilog, System Verilog
  • Proficiency in developing SV/UVM based test benches
  • Proficient in debugging RTL/TB issues using Verdi or similar tools
  • Proficient with scripting languages such as Perl and(or) Python

Önskade kvalifikationer

  • Knowledge of UPF, low power architecture
#Hardware Engineering
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Företag

Qualcomm

Publicerade jobb

för 1 månad sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Bangalore, India

Kvalifikation

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