Layout Design, Staff Engineer

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I korthet

Synopsys sucht einen Staff Engineer für Layout Design in Bengaluru, Indien. Diese Rolle konzentriert sich auf das Design von hochmoderner PHY IP für KI-, 5G- und HPC-Anwendungen, wobei tiefes Verständnis für FinFET- und GAA-Technologien sowie für tiefsubmikrone Effekte erforderlich ist.

Ansvarsområden

Lead layout development for cutting edge DDR, HBM, and UCIe PHY IP across 7nm and below process nodes including FinFET and GAA technologies
Own floorplanning, layout matching, ESD design, latch-up mitigation, and DFM compliance for analog and mixed-signal blocks that have to work in silicon
Drive layout reviews, quality checks, PERC and EMIR analysis, and release processes that meet both internal standards and customer requirements
Mentor junior layout engineers through hands-on technical leadership, teaching them how to solve real problems in deep submicron design
Collaborate with cross-functional teams including analog designers, verification engineers, and foundry partners to meet project timelines and deliver best-in-class IP
Estimate effort, plan schedules, and execute layout projects in a multi-site, cross-functional environment where dependencies are real and deadlines matter
Support critical customer-facing layout requirements including bond-pad layout, IO frame design, pitch requirements, and LEF generation

Krav

BTech or MTech in Electronics Engineering, VLSI, or related field
5+ years of hands-on layout design experience in analog, mixed-signal, or PHY IP development
Deep understanding of deep submicron effects and proven experience with FinFET and GAA process technologies at 7nm and below
Expertise in layout matching techniques, ESD design, latch-up mitigation, PERC, EMIR analysis, DFM, and LEF generation
Demonstrated ability to lead layout projects from floorplan through release, meeting quality and schedule commitments
Experience with bond-pad layout, IO frame design, and pitch requirements for high-speed interfaces
Understanding of PHY level customer requirements and how layout decisions affect system-level performance is a strong plus

Önskade kvalifikationer

Ability to look at a floorplan and spot signal integrity problems and know how to fix them without compromising the area budget
Own project outcomes, ask the right questions, align the team, and drive execution
Mentoring involves working through tough matching problems together to ensure understanding
Clear communication with analog designers and verification engineers
Ability to analyze and resolve EMIR report issues by adjusting metal stacks and iterating
Experience in cross-functional, multi-site teams and managing projects with dependencies across time zones and organizations

Förmåner

Competitive salaries
Comprehensive medical and healthcare plans
ETO and FTO Programs
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
Retirement Plans
Talented and passionate individuals making a difference
Opportunity to work on next generation DDR, HBM, and UCIe PHY IP

Färdigheter

DDRHBMUCIeFinFETGAADRCLVSEMIRLEF

#Engineering#semiconductor solutions#chip architecture#circuit design#verification#PHY IP#FinFET#GAA#deep submicron effects#AI#5G#high-performance computing#DDR#HBM#UCIe#floorplanning#ESD design#latch-up mitigation#DFM compliance#analog and mixed-signal blocks#layout reviews#quality checks#PERC#EMIR analysis#release processes#junior layout engineers#technical leadership#signal integrity#power efficiency#BTech#MTech#Electronics Engineering#VLSI#analog designers#verification engineers#foundry partners#bond-pad layout#IO frame design#pitch requirements#high-speed interfaces#SoCs#automotive#data center applications

Om Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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