Layout Design, Staff Engineer
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I korthet
Synopsys is looking for a Staff Engineer to lead physical layout design for advanced memory IP, including SRAM, ROM, and eDRAM. This role involves ensuring designs meet foundry rules, optimizing for area, performance, and manufacturability, and mentoring junior engineers. The position is based in Da Nang, Vietnam.
Ansvarsområden
- Lead physical layout design for advanced memory IP including SRAM, ROM, and eDRAM at the cell, array, and peripheral circuit levels
- Ensure every layout meets foundry process design rules and memory-specific constraints, resolving DRC and LVS issues with precision
- Optimize layouts for area efficiency, performance targets, power consumption, yield improvement, and manufacturability
- Perform RC extraction and parasitic analysis on dense memory arrays, then iterate to improve signal integrity and timing margins
- Debug complex layout issues including electromigration, IR drop, and soft error susceptibility with reliability teams
- Collaborate with circuit designers, verification engineers, and process teams to deliver first-pass silicon success
- Mentor junior layout engineers on best practices, tool usage, and design tradeoffs
Krav
- Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or a related technical field
- At least 5 years of hands-on experience in custom layout design with significant focus on memory structures like SRAM, ROM, or eDRAM
- Deep expertise in memory layout at the transistor and cell level, including array structures, sense amplifiers, decoders, and peripheral circuits
- Proficiency with layout tools such as Custom Compiler, Virtuoso, or IC Compiler for physical design and verification
- Strong working knowledge of foundry process design rules, DRC/LVS verification flows, and memory-specific layout constraints
- Experience performing RC extraction, analyzing parasitic effects, and iterating layouts to meet signal integrity requirements
Önskade kvalifikationer
- Detail-oriented mindset for dense memory structures
- Ability to synthesize input from circuit designers and process engineers into better layouts
- Analytical approach to problem-solving, isolating variables, and testing hypotheses
- Initiative to improve processes and tools
- Genuine enjoyment in mentoring engineers and explaining layout choices
Förmåner
- Competitive salaries
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP - Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement plans
- Comprehensive range of health, wellness, and financial benefits
#Engineering#Layout Design#Staff Engineer#Memory IP#SRAM#ROM#eDRAM#Semiconductor
Företag
Synopsys Inc
Publicerade jobb
för 4 veckor sedan
Anställningstyp
Heltid
Arbetsform
På plats
Erfarenhetsnivå
Senior
Platser
Da Nang, Vietnam
Kvalifikation
Kandidatexamen, Masterexamen
Sökande
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