The Job

Interface IP Verification Engineer (Pre-Silicon) - 18381

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

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I korthet

Synopsys seeks an experienced Interface IP Verification Engineer in Austin, Texas to own the verification of complex Interface IP solutions including PCIe, CXL, DDR, and Ethernet. This role requires deep expertise in SystemVerilog and UVM, and will involve architecting, developing, and enhancing verification environments to ensure the quality and reliability of cutting-edge semiconductor products.

Ansvarsområden

  • Own verification of complex Interface IP solutions, including PCIe, CXL, DDR, and Ethernet technologies.
  • Architect, develop, and enhance scalable UVM-based verification environments and reusable verification IP.
  • Define verification strategies and test plans from specification review through product release.
  • Develop constrained-random, coverage-driven verification solutions using SystemVerilog and UVM.
  • Drive functional coverage closure and verification signoff activities.
  • Debug challenging RTL, protocol, and system-level issues while improving verification efficiency and automation.
  • Partner closely with architecture, RTL, firmware, and systems teams to identify issues early and ensure robust product quality.
  • Mentor engineers contributing to verification methodology improvements across the organization.

Krav

  • BSEE/MSEE with at least 5 years of direct industry experience with proven experience verifying complex ASIC or SoC designs.
  • Deep expertise with SystemVerilog and UVM methodologies.
  • Strong protocol knowledge in one or more of the following areas: PCI Express (PCIe), Compute Express Link (CXL), DDR Memory Interfaces, Ethernet.
  • Experience developing constrained-random and coverage-driven verification environments.
  • Strong debugging and problem-solving skills spanning RTL, verification, and protocol compliance.
  • Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.
  • Ability to independently drive technical initiatives while collaborating across geographically distributed teams.

Önskade kvalifikationer

  • Experience with verification IP development, assertion-based verification and formal methodologies.
  • Knowledge of modern SoC architectures and high-speed communication interfaces.

Förmåner

  • Competitive salaries.
  • Annual bonus, equity, and other discretionary bonuses may be eligible.
  • Comprehensive health, wellness, and financial benefits.
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back (ESPP).
  • Save for your future with our retirement plans.
  • Comprehensive medical and healthcare plans.
  • ETO and FTO Programs for Time Away.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
  • Opportunity to work on technology at the heart of the semiconductor ecosystem.
  • Influence products used across the global semiconductor industry.
  • Advance your technical leadership and career growth.
  • Contribute to technologies shaping the future of computing.
#Hardware Engineers#semiconductor solutions#chip architecture#circuit design#verification#semiconductor products#technology#innovations#ASIC Verification Engineer#protocol challenges#Interface IP#PCIe#CXL#DDR#Ethernet#AI accelerators#data centers#networking platforms#SoCs#SystemVerilog#UVM#coverage-driven verification#RTL#protocol compliance#simulators#VCS#ModelSim
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Företag

Synopsys Inc

Publicerade jobb

för 4 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Mellannivå

Platser

Austin, United States

Kvalifikation

Kandidatexamen, Masterexamen

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