The Job

High Speed IP PHY/USB Applications Principal Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

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I korthet

As a Principal Engineer at Synopsys in Yongin-si, South Korea, you will provide critical technical support for DesignWare USB Mixed Signal PHY IP integration, troubleshooting customer issues from synthesis to silicon bring-up. This role requires extensive ASIC design and verification experience, strong communication skills in Korean and English, and the ability to collaborate with R&D teams to ensure customer success.

Ansvarsområden

  • Provide technical support for DesignWare USB Mixed Signal PHY IP integration, from initial integration through silicon bring-up and debug.
  • Troubleshoot customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing in USB PHY and SoC integration contexts.
  • Guide customers through USB 2.0, USB 3.x, and Type-C implementation considerations and design tradeoffs.
  • Collaborate with Korea AE team and Synopsys R&D and product teams to escalate complex issues and drive root-cause analysis.
  • Contribute to customer support coverage for other high-speed interface PHY IP (e.g., MIPI, PCIe, HDMI).
  • Deliver technical presentations and integration best practices to customer engineering teams.
  • Travel occasionally to customer sites across Korea and the region.

Krav

  • Bachelor's or Master's in Electrical Engineering or Computer Engineering.
  • 10 to 20+ years of ASIC design, verification, or SoC integration experience.
  • Strong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing.
  • Ability to work independently and drive ambiguous, customer-driven issues to resolution.
  • Excellent communication skills in Korean and English.
  • Willingness to travel occasionally within Korea and the region.

Önskade kvalifikationer

  • USB 2.0, USB 3.x, Type-C, or USB PHY integration experience is a strong plus.
  • Broader high-speed interface background (e.g., MIPI, PCIe, HDMI) is a plus.

Förmåner

  • Enable customer success on high-stakes tapeouts by resolving USB PHY integration issues.
  • Reduce time-to-silicon by providing clear, actionable guidance.
  • Build deep technical relationships with leading semiconductor companies in Korea.
  • Shape future IP releases by channeling real customer pain points back into the product team.
  • Expand Synopsys footprint in customer accounts through technical depth, responsiveness, and cross-team collaboration.
#ASIC design#verification#integration#customer support#PHY IP
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Företag

Synopsys Inc

Publicerade jobb

för 1 månad sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Ledning

Platser

Yongin-si, South Korea

Kvalifikation

Kandidatexamen, Masterexamen

Sökande

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