The Job

Hardware System Design Engineer, Senior or Staff

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system

Gå med för uppdateringar

I korthet

Qualcomm is seeking a Senior or Staff Hardware System Design Engineer in San Diego, CA, to join their FPGA-based emulation platform development team. This role involves full ownership of the board design lifecycle, including schematic capture, PCB layout, power/signal integrity simulation, and system-level architecture. Responsibilities extend to cross-functional collaboration and technical leadership for senior candidates.

Ansvarsområden

  • Own the board design lifecycle: schematic capture, PCB stack-up, PCB layout, BOM management, and design verification testing.
  • Drive system-level architecture in collaboration with customers, software, and firmware development teams.
  • Perform power and signal integrity simulations for 10 Gbps+ SERDES and high-speed I/O, from model extraction through simulation, reporting, and recommended design changes.
  • Lead or support FPGA board design (Xilinx and/or Altera), including DDR3/DDR4/DDR5 discrete memory subsystems.
  • Direct lab technicians on system installation, bring-up, and debug of boards and multi-board systems, including root-cause investigation of the most complex issues.
  • Collaborate with mechanical, PCB layout, and manufacturing teams to ensure designs are optimized for signal integrity, manufacturability (DFM), and reliability.
  • Author and maintain design documentation (HDDs, pinout tables, design review packages) to support cross-team alignment and program reviews.
  • Serve as a key or primary technical point of contact with customers and cross-functional stakeholders on system architecture decisions and trade-offs.
  • Support factory/production builds and new product introduction (NPI) activities as needed.

Krav

  • Experience with the board design process including schematic capture, PCB stack-up, PCB layout (26+ layers), BOM management, and design verification testing.
  • Experience with FPGA board design (Xilinx and/or Altera).
  • FPGA HDL coding experience.
  • Experience with 10 Gbps or higher SERDES board designs.
  • Experience performing power and signal integrity simulations for 10 Gbps+ signals, including various I/O analyses, using established methodologies from model extraction through simulation, reporting, and recommending design changes to address failing simulations.
  • Experience with circuit and layout guidelines, high-speed design concepts, signal integrity, and transmission line theory.
  • Experience with DDR3/DDR4/DDR5 discrete component board designs.
  • System architecture design experience; candidates for the Staff level should have experience defining architecture across multiple boards/platforms.
  • Familiarity with I2C, JTAG, UART, SPI, SD Card, PCIe, and eMMC protocols.
  • Familiarity with test equipment including oscilloscopes, logic analyzers, and protocol analyzers.
  • Board- and system-level bring-up and debug experience.
  • Basic Linux/Unix experience.
  • Familiarity with Microsoft Office, Mentor Graphics DxDesigner/Expedition, Vivado, Quartus, HyperLynx, Sigrity PowerSI/PowerDC, ADS, Ansys HFSS, and SPICE.
  • Proven ability to work with cross-functional teams (mechanical, PCB layout, manufacturing, software/firmware, program management) to deliver high-quality boards and systems on schedule.
  • Strong written and verbal communication skills, including the ability to present design trade-offs and simulation results to technical, customer, and cross-functional audiences.
  • Demonstrated ability to work independently, prioritize competing priorities, and drive tasks to closure with minimal supervision.
  • Experience mentoring or providing technical guidance to junior engineers; Staff-level candidates should also demonstrate experience mentoring senior engineers and leading design reviews.
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  • OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • OR PhD in Science, Engineering, or related field.

Önskade kvalifikationer

  • Power supply design experience.
  • Experience with signal integrity and PDN (power delivery network) simulations.
  • Experience with Design for Manufacturing (DFM) and Design for Test (DFT) reviews with PCB fabricators and contract manufacturers.
  • Familiarity with scripting languages (Python, Perl) for design automation, data extraction, or test/analysis workflows.
  • Industry certification such as IPC Certified Interconnect Designer (CID) or equivalent.
  • Experience supporting a product from concept through production release and factory NPI.
  • (Staff) Experience defining board/system design methodology or reusable IP/standards adopted across multiple programs, and/or prior experience as a technical lead or architect on a hardware program.

Förmåner

  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
#hardware#system design#FPGA#ASIC#PCB#signal integrity#power integrity#San Diego#Qualcomm
Qualcomm Logo

Företag

Qualcomm

Publicerade jobb

för 2 dagar sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

San Diego, United States of America

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

Sökande

Ansök tidigt