The Job

GPU (RTL) Design - Sr Lead

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Qualcomm is seeking a Senior Lead GPU RTL Design Engineer with 4-8 years of experience in ASIC RTL design, logic design, and micro-architecture using Verilog/SystemVerilog. The role involves working with complex multi-clock domain blocks, AMBA protocols, and ASIC development tools in Bangalore, India.

Ansvarsområden

  • Design and integration of complex multi clock domain blocks.
  • Work closely with the Design verification and validation teams for pre/post Silicon debug.
  • Experience in Synthesis / Understanding of timing concepts for ASIC is must.

Krav

  • Minimum 4 to 8 years of work experience in ASIC RTL Design.
  • Experience in Logic design/micro-architecture/RTL coding is a must.
  • Must have hands on experience with design and integration of complex multi clock domain blocks.
  • Experience in Verilog/System-Verilog is a must.
  • Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture.
  • Hands on experience in Multi Clock designs, Asynchronous interface is a must.
  • Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Önskade kvalifikationer

  • Understanding of Memory controller designs and microprocessors is an added advantage.
  • Hands on experience in Low power design is preferable.
#GPU#RTL Design#Hardware Engineering#ASIC#Logic design#micro-architecture#Verilog#System-Verilog#AMBA#AXI#AHB#APB#clocking#reset#debug architecture#Multi Clock designs#Asynchronous interface#Lint#CDC#Design compiler#Primetime#Memory controller#microprocessors#Design verification#validation#Silicon debug#Low power design#Synthesis#timing concepts
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Företag

Qualcomm

Publicerade jobb

för 1 vecka sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Bangalore, India

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

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