The Job

Front-End & Back-End SoC Engineering, Principal Engineer

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Synopsys is seeking a Principal Engineer for SoC Engineering in Munich, Germany. This role requires a technical lead with 15+ years of experience in complex SoC/ASIC development from architecture to tapeout, covering both front-end and back-end design. Responsibilities include leading teams, defining technical strategy, and ensuring on-schedule delivery of high-quality silicon for advanced products.

Ansvarsområden

  • Technically lead end-to-end SoC and ASIC development from architecture definition through GDS tapeout.
  • Define and drive front-end activities including SoC architecture, IP subsystem integration and hardening (PCIe, DDR, UCIe, Ethernet), RTL development, functional verification planning, and DFT implementation.
  • Own back-end physical implementation including floorplanning, hierarchical partitioning, place and route, clock tree synthesis, PPA optimization, and timing closure.
  • Drive specification-driven constraints development for functional and DFT modes, manage STA, IR-drop, EM analysis, DRC/LVS signoff, formal verification, and ECO strategies.
  • Work with geographically distributed engineering teams and collaborate with external subcontracting partners, managing schedules, risks, dependencies, and resource allocation.
  • Interface directly with customers, internal management, Sales, IP and EDA business units, to align on technical decisions, delivery milestones, and tapeout readiness.
  • Conduct technical reviews and make major design decisions that balance performance, power, area, quality, schedule, and cost targets for multi-billion transistor designs.
  • Support technical presales by gathering requirements and preparing effort estimates.

Krav

  • Master's degree in Electrical Engineering, Computer Engineering, or related discipline.
  • 15+ years of semiconductor industry experience with proven leadership of complex SoC or ASIC projects through successful tapeout.
  • Extensive hands-on expertise in both SoC front-end and back-end implementation.
  • Deep knowledge of SoC architecture and integration, RTL design in Verilog/SystemVerilog, functional verification, DFT, physical design and implementation, timing signoff constraints, and timing closure methodologies.
  • Strong experience with advanced process nodes and the implementation challenges that come with them, including managing IR-drop, EM, and multi-corner multi-mode timing closure.
  • Direct experience integrating and hardening high-speed subsystems such as PCIe, DDR, UCIe, or Ethernet in SoC environments.
  • Proficiency with Synopsys EDA tools including Fusion Compiler, PrimeTime, PrimePower, VCS, Formality, Redhawk SC, TestMax, and VC Spyglass.
  • Experience with multi-billion transistor SoCs, chiplet-based architectures, advanced packaging, AI/ML, automotive, HPC, networking, or datacenter products, or functional safety standards such as ISO 26262 is a plus.
  • Proactive and self-motivated, with the ability to take initiative and work independently with minimal guidance.
  • Customer-focused and results-oriented, with a strong commitment to delivering excellence.
  • Collaborative and adaptable, with the ability to thrive in dynamic, fast-paced environments.
  • Detail-oriented and quality-driven, with a meticulous approach to achieving high standards of performance.

Önskade kvalifikationer

  • Experience with Platform Architect, DSO.ai, Fusion.ai, RTLA, TCM, or Git/GitHub/Copilot is a plus.

Förmåner

  • Comprehensive medical and healthcare plans.
  • ETO and FTO Programs in addition to company holidays.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
  • ESPP: Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.
  • Retirement Plans (vary by region and country).
  • Competitive salaries.
#SoC#ASIC#EDA#IP#semiconductor#chiplet#AI#automotive#HPC#networking#datacenter#functional safety
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Företag

Synopsys Inc

Publicerade jobb

för 2 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Ledning

Platser

Munich, Germany

Kvalifikation

Masterexamen

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