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DFT Engineer (Senior to Staff level)

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Qualcomm is looking for a Senior to Staff level DFT Engineer to join their Hardware Engineering group in Toronto, Ontario. This role involves developing, maintaining, and supporting DFT methodologies and flows for ASICs and SoC designs, as well as writing and automating RTL for advanced DFT features.

Ansvarsområden

  • Act as a member of Qualcomm's central DFT methodology group, responsible for developing, maintaining, and supporting flows across all company business units and projects.
  • Architect methodologies and flows for an integrated, RTL centric "shift left" DFT environment across company IPs, ASICs, and SoC designs.
  • Write and automate RTL for advanced DFT and DFD features not currently supported by EDA vendors.
  • Develop automated verification test bench and sequence creation for DFT IP, and architect end-to-end verification solutions.
  • Build IP/block and SoC level scan insertion flows and script ATPG retargeting procedures.
  • Create automated QoR checks for implementation quality control.
  • Write static timing constraints, create waivers, and devise flows for "bullet proof" timing checks.

Krav

  • Bachelor's degree in engineering science, Electrical and Computer Engineering, or Computer Science.
  • 10+ years of experience in complex SoC designs in RTL, DFT, or FE capacity.
  • Vast experience with various DFT EDA tools from Siemens, SNPS, and Cadence.
  • Good knowledge and understanding in Verilog/VHDL and SystemVerilog.
  • Exposure to CAD and automation.
  • Good exposure to using de-Perl techniques in creating generic codes.
  • Extensively experienced with main DFT standards such as JTAG (1149.1/1149.6/1500), iJTAG (1687), and BIST techniques (memory BIST, logic BIST, interconnect BISTs).
  • Experience in SoC and IP/Block level scan insertion and ATPG, simulation of zero delay and SDF annotated test sequences.

Önskade kvalifikationer

  • Knowledge of TCL and Python is a plus.
  • Track record in integrating custom made DFT logic for complex SoCs (System-On-Chip) and CoWoS (Chip-On-Wafer-On-Substrate) designs is highly desirable.

Förmåner

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
#DFT Engineer#Hardware Engineering#RTL#ASIC#SoC#EDA#JTAG#BIST#TCL#Python
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Företag

Qualcomm

Publicerade jobb

för 3 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Toronto, Canada

Kvalifikation

Kandidatexamen, Masterexamen, Doktorand

Sökande

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