DFT Engineer, Senior
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system
I korthet
Qualcomm is looking for a Senior DFT Engineer to define and execute the end-to-end DFT strategy, including Scan, Boundary Scan/JTAG, and Memory/Logic BIST. Responsibilities include pre-silicon verification with ATPG, MBIST, LBIST, and collaboration with physical design teams. The role also involves silicon bring-up, diagnosing failing patterns, and driving yield improvements, as well as automating DFT flows with scripting languages.
Ansvarsområden
- Define and execute the end-to-end DFT strategy including Scan, Boundary Scan/JTAG, and Memory/Logic BIST.
- Perform RTL insertion & Verification.
- Utilize ATPG with standard industry tools for high-quality test patterns (Stuck-At, At-Speed, Path-Delay etc).
- Employ scan compression & scan data streaming techniques to reduce test time.
- Design & implement MBIST & LBIST architecture in RTL.
- Collaborate with Physical design teams to resolve DFT related timing violations.
- Conduct Gate Level Timing & Power Aware simulations.
- Partner with Test Engineers to bringup initial Silicon.
- Diagnose and resolve failing patterns & drive yield improvements.
- Write and maintain scripts (Python, Tcl, or Perl) to automate the DFT insertion and verification flows.
Krav
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- Experience deploying agentic AI tools for optimizing semiconductor workflows.
- Experience with Scan, Boundary Scan/JTAG, and Memory/Logic BIST.
- Experience with ATPG using standard industry tools.
- Experience with scan compression & scan data streaming techniques.
- Experience in designing & implementing MBIST & LBIST architecture in RTL.
- Experience with Gate Level Timing & Power Aware simulations.
- Experience with scripting languages like Python, Tcl, or Perl for automation.
Förmåner
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support your success at work, at home, and at play.
#DFT#Hardware Engineering#Semiconductor#AI