Design Verification Manager, Silicon
Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling · Inbyggda system · QA och testning
I korthet
Lead comprehensive verification activities for complex System-on-Chip (SoC) architectures, ensuring robust quality standards from pre-silicon to tape-out. Manage and mentor high-performing engineering teams, drive execution, foster technical excellence, and oversee pre-silicon emulation strategies and post-silicon debug activities.
Ansvarsområden
- Lead and manage comprehensive verification activities for complex System-on-Chip (SoC) architectures, ensuring robust quality standards from pre-silicon to tape-out.
- Manage and mentor high-performing engineering teams, driving execution, fostering a culture of technical excellence, and supporting career growth.
- Drive SoC-level pre-silicon emulation strategies (e.g., Palladium, Zebu, SimXL) to accelerate hardware-software co-verification, boot operating systems, and catch complex system-level bugs early.
- Oversee complex post-silicon debug activities, collaborating closely with post-silicon validation teams to root-cause silicon issues, bring up hardware, and correlate pre-silicon verification coverage with actual silicon behavior.
- Develop and scale aspects of logic verification infrastructure and advanced methodologies across the SoC, maintaining strong integration standards with architecture, design, and cross-functional teams.
Krav
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 15 years of experience in front-end design or design verification.
- Experience in power-aware verification methodologies.
- Experience in fabric and interconnect architectures and cache coherency protocols.
Önskade kvalifikationer
- Master's degree in Electrical Engineering or Computer Science or equivalent practical experience.
- Experience in verification of high-bandwidth memory subsystems (DDR5, LPDDR5, HBM) including physical layer (PHY) training, memory controllers, and JEDEC compliance.
- Extensive experience directly managing high-performing engineering teams with a proven track record of successfully delivering complex, production-grade SoCs.
- Technical expertise in SoC-level verification and strong design verification (DV) fundamentals using universal verification methodology (UVM)-based environments.
- Direct Experience with pre-silicon emulation platforms and hardware accelerators (e.g., SimXL, formal verification, or portable stimulus standard/PSS).
- Strong programming skills in SystemVerilog, Verilog, and scripting languages like Python or Perl.
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