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ASIC Physical Design, Staff Engineer - 18156

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Synopsys is looking for an experienced ASIC Physical Design Staff Engineer in Ho Chi Minh City, Vietnam. This role involves owning the full RTL-to-GDSII physical implementation flow, developing and maintaining back-end flows, and collaborating with cross-functional teams to ensure successful first-pass silicon. The ideal candidate has strong scripting skills in Python, Tcl, and Perl, and deep expertise in synthesis, floorplanning, placement, routing, and sign-off.

Ansvarsområden

  • Own the full RTL-to-GDSII physical implementation flow for memory test-chip blocks and top-level designs, driving synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off closure
  • Develop and maintain Back-End implementation and sign-off flows including PnR, STA, PV, IR/EM analysis, and extraction methodologies
  • Review and implement foundry sign-off requirements and tape-out checklists, ensuring manufacturing compliance and first-pass silicon success
  • Execute timing analysis and closure across multiple PVT corners, optimizing for power, performance, and area
  • Drive physical and electrical verification using Synopsys IC Validator, resolving DRC, LVS, ERC, antenna, EM, IR-drop, and signal integrity issues
  • Collaborate with Foundry, CAD, Front-End, DFT, STA, and Design teams to resolve implementation challenges and hit project milestones
  • Build automation frameworks and scripts in Python, Tcl, and Perl that improve design productivity and flow efficiency

Krav

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline
  • 5+ years of hands-on ASIC physical design experience with proven silicon tape-outs, ideally on advanced process nodes
  • Deep expertise across the full RTL-to-GDSII implementation flow including synthesis, floorplanning, power planning, placement, CTS, routing, and sign-off
  • Strong proficiency with Synopsys tools including Fusion Compiler or ICC2, PrimeTime, StarRC, and IC Validator
  • Solid scripting and automation skills in Tcl, Python, and Perl with a track record of building flows that improve team efficiency
  • Experience setting up and maintaining Back-End design and sign-off methodologies including PnR, STA, PV, extraction, and IR/EM analysis
  • Ability to interpret and implement foundry sign-off requirements and tape-out checklists to ensure manufacturing readiness

Önskade kvalifikationer

  • You can look at a floorplan and immediately see the congestion, power, or timing problems that will surface later, and you address them before they become crises
  • When a sign-off violation appears, you dig into the data, trace it to root cause, and fix it in a way that makes sense for the design and the flow
  • You write scripts and build flows with the next engineer in mind, clear variable names, comments that explain why, and structure that someone else can extend
  • You communicate clearly across disciplines, translating technical issues for front-end designers or CAD engineers without losing the thread
  • You stay calm under pressure, especially in the final weeks before tape-out, and you help the team stay focused on what actually matters

Förmåner

  • Comprehensive medical and healthcare plans that work for you and your family.
  • In addition to company holidays, we have ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
  • Save for your future with our retirement plans that vary by region and country.
  • Competitive salaries.
#ASIC#Physical Design#Staff Engineer#Engineering#Hardware Engineering#semiconductor solutions#chip architecture#circuit design#verification#RTL to GDSII#synthesis#floorplanning#power planning#placement#CTS#routing#sign-off closure#Back-End implementation#PnR#STA#PV#IR/EM analysis#extraction methodologies#timing analysis#DRC#LVS#ERC#antenna#signal integrity#Foundry#CAD#Front-End#DFT#Python#Tcl#Perl#automation#Synopsys#memory test-chip
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Företag

Synopsys Inc

Publicerade jobb

för 1 månad sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Senior

Platser

Ho Chi Minh City, Vietnam

Kvalifikation

Kandidatexamen, Masterexamen

Sökande

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