ASIC Digital Design, Sr Manager - IP Verification- PCIe/CXL

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Synopsys is looking for a Sr. Manager of ASIC Digital Design with expertise in IP Verification for PCIe/CXL. This role involves leading verification strategies, defining requirements for Verification IP, and ensuring alignment with Design IP verification needs. The ideal candidate will have extensive experience with PCI Express and high-speed serial protocols, driving innovation and improving product quality.

Date posted 05/24/2026

Category Engineering Hire Type Employee Job ID 17583 Remote Eligible No Date Posted 05/24/2026

Job Titles

  • Sr. Manager, ASIC Verification - Interface IP- PCIe/CXL

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent a decade deep in PCI Express, and you know the specification the way most people know their commute. You have read the errata, tracked the ECNs, and debugged corner cases that only show up when three features collide in a way the spec never quite spelled out. You are the person teams pull into a room when something does not make sense.

You have lived on both sides of the verification equation. Maybe you built Verification IP, maybe you used it to validate complex controller and PHY designs, but either way, you understand the gap between what a VIP can do and what a design team actually needs. That gap frustrates you, and you have strong opinions about how to close it. You think in requirements and traceability. Working across geographies and functions does not slow you down. You communicate clearly, align stakeholders without drama, and get results.

What You'll Be Doing

  • Own the alignment between Verification IP capabilities and Design IP verification needs, identifying gaps in feature coverage for both Controller and PHY
  • Drive requirements definition for Verification IP based on real Design IP verification use cases
  • Track PCI Express specification updates, ECNs, and errata, translating changes into actionable requirements for both VIP and Design IP teams
  • Review and critique testplans across projects, pushing teams toward best-in-class coverage and traceability
  • Report VIP deployment metrics and drive continuous improvement in how VIP is integrated into verification flows
  • Work hands-on with UVM-based verification environments to validate VIP usage and model best practices

The Impact You Will Have

  • You will close the gap between what Verification IP delivers and what Design IP teams actually need
  • Your work will shift verification left, catching issues earlier and reducing costly respins downstream
  • You will change how teams think about VIP as a strategic asset that evolves with design needs
  • Your protocol expertise will ensure Synopsys PCIe and CXL IP stays ahead of specification changes
  • You will standardize verification workflows, raising the bar for testplan rigor and coverage discipline
  • You will improve cross-functional collaboration between VIP and Design IP teams, reducing friction and improving product quality

What You'll Need

  • 15+ years of hands-on experience in digital verification, with significant time on PCI Express or high-speed serial protocols
  • Deep subject matter expertise in PCI Express Link Layer and PHY Layer, including specification details and errata
  • Proven experience in IP product development, either building Verification IP or deploying it to verify complex Design IP
  • Strong UVM knowledge and experience in UVM-based verification environments
  • Track record of driving results in cross-functional, matrixed organizations across geographies
  • Experience with CXL or other coherent interconnect protocols is a plus

Who You Are

  • You are results driven and define the path forward without waiting for perfect alignment
  • You critique testplans and verification strategies constructively, making the work better without making it personal
  • You are adaptable and thrive where priorities shift, teams are distributed, and stakeholders have competing needs
  • You think in systems, seeing how a gap in VIP coverage today becomes a customer escalation tomorrow
  • You are hands-on when it matters, jumping into a testbench or debugging a protocol sequence to unblock the team

The Team You'll Be Part Of

Your recruiter will share more about the team structure and mission during the interview process.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

#asic-verification#sr-manager#pcie#cxl#ip-verification#digital-design#semiconductor#hardware-engineering#bengaluru
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Synopsys Inc

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för 3 veckor sedan

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Bengaluru, India

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