The Job

ASIC Design Verification Engineer

Teknik, data och digitalt · Mjukvaru- och webbutveckling · Mjukvaruutveckling

Gå med för uppdateringar

I korthet

Qualcomm Atheros is looking for an ASIC Design Verification Engineer to join their team in Santa Clara, CA. The role involves developing leading-edge ASICs for mobile platforms, including RTL design, test bench development, and synthesis tasks. Knowledge of wireless LAN, Bluetooth, and RF transceivers is required.

Ansvarsområden

  • Participate in the development of leading-edge ASICs for multi-function mobile platforms.
  • Develop unit-level and integrated-level test benches.
  • Assist in synthesis and gate-level simulation tasks related to your module.
  • Assist with timing of the entire chip.

Krav

  • Bachelor's degree in Science, Engineering, or related field.
  • RTL Design experience.
  • ASIC front-end experience.
  • Scripting Languages knowledge (e.g. Perl or Python).
  • Leverage knowledge of wireless LAN, Bluetooth, and RF transceiver.

Önskade kvalifikationer

  • Experience with Assembly Language
  • Experience with Application-Specific Integrated Circuit
  • Experience with Algorithms
  • Experience with C++

Förmåner

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support your success at work, at home, and at play.
#ASIC#Design Verification#RTL#wireless#RF#Analog#mobile platforms
Qualcomm Logo

Företag

Qualcomm

Publicerade jobb

för 2 veckor sedan

Anställningstyp

Heltid

Arbetsform

På plats

Erfarenhetsnivå

Mellannivå

Platser

Santa Clara, United States of America

Kvalifikation

Kandidatexamen

Sökande

Ansök tidigt