Analog/Mixed Signal PLL Analog Designers
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I korthet
Qualcomm is looking for an Analog/Mixed Signal PLL Analog Designer with 6-12 years of experience in Bangalore, India. The role involves designing analog and mixed-signal integrated circuits for high-speed PLL/DLL/LDO/Data Converter IPs for SoCs, focusing on low-power and low-voltage designs for wireless products.
Ansvarsområden
- Own the architecture, design, and development of analog and mixed-signal hard macros for the PLL IP design team.
- Design multiple analog building blocks, including bias circuits, references, op-amps, LDOs, VCOs/DCOs, and high-speed custom digital blocks such as dividers and clock distribution.
- Perform custom circuit design in the latest FinFET CMOS process technologies, deliver hard macros, and support customer integration and testing.
- Set up, run, and analyze SPICE circuit simulations, and create behavioral models.
- Collaborate closely with layout, digital design, physical design, and HSIO Bench/ATE teams.
- Participate in internal customer requirement discussions to create clear design specifications.
Krav
- Minimum 6 years of transistor-level analog/mixed-signal design experience, preferably in PLL design, data converters (ADC/DAC), or other high-speed applications.
- Experience using SPICE simulators, ADEXL, and Virtuoso.
- Familiarity with custom analog layout, parasitic optimization, post-layout extraction, verification, and design review closure.
- Understanding of signal integrity in high-speed wireline design is preferred.
- Scripting experience to automate circuit design and verification workflows.
- Ability to collaborate effectively with global cross-functional teams and communicate technical concepts clearly through documentation and presentations.
Önskade kvalifikationer
- Mixed-signal design experience, especially in PLL/DLL clocking architectures, high-speed interfaces, SoC integration, advanced CMOS/FinFET nodes, and scripting.
#Analog Circuit Design#Mixed-Signal IP#PLL#DLL#LDO#Bias#Reference#VCO#DCO#Clock Distribution#ADC#DAC#SPICE#Virtuoso#ADEXL#FinFET#Analog Layout#Post-Layout Simulation