UCIe Applications Engineer, Staff

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys is seeking a Staff UCIe Applications Engineer in Hsinchu, Taiwan, to guide customers in integrating leading-edge UCIe IP into their SoC designs. This role involves providing expert advice on configuration, simulation, and testing, collaborating with R&D, and delivering training to customer teams. The ideal candidate has a minimum of 5 years of experience in ASIC/Analog PHY design or applications engineering with advanced technology nodes.

Responsibilities

  • Guide customers through the integration of Synopsys UCIe IP into their ASIC SoC and systems, addressing both technical and process challenges.
  • Provide expert advice on IIP configuration, simulation, synthesis, floorplanning, static timing analysis (STA), and design-for-test (DFT) strategies.
  • Conduct in-depth integration reviews at key SoC development milestones to ensure optimal IP performance and compatibility.
  • Deliver comprehensive training and workshops to customer engineering teams on the latest UCIe specifications and integration best practices.
  • Collaborate with Synopsys R&D to develop application notes and technical collateral on advanced integration topics.
  • Provide feedback and insights to R&D for continuous improvement of Synopsys IIP products based on customer experiences and emerging industry trends.
  • Participate in internal design reviews to align product development with evolving customer needs and market demands.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Minimum 5 years of experience in ASIC/Analog PHY design, or applications engineering within advanced technology nodes (10nm/7nm/5nm/3nm).
  • Hands-on expertise in mixed-signal and high-speed interface design and integration, ASIC front-end and/or back-end implementation, including simulation, synthesis, floorplanning, and DFT.
  • Strong knowledge of EDA tools and methodologies, with additional experience in P&R, Physical Verification, and Signal/Power Integrity highly valued.
  • Proven ability to debug and troubleshoot silicon and/or FPGA/hardware, with familiarity in Die-to-Die and PCIe/CXL protocols considered a significant advantage.

Desired Qualifications

  • Detail-oriented, self-motivated, and committed to delivering high-quality results.
  • Exceptional problem-solving and analytical skills, with a methodical approach to complex challenges.
  • Excellent verbal and written communication skills, able to convey technical concepts clearly to diverse audiences.
  • Collaborative team player who thrives in cross-functional environments and values diversity of thought.
  • Adaptable and eager to continuously learn about new technologies and industry trends.
#engineering#semiconductor#chip design#verification#IP integration#UCIe#SoC
Synopsys Inc Logo

Company

Synopsys Inc

Job Posted

4 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Hsinchu, Taiwan

Qualification

Bachelor, Master

Applicants

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