Technical Architect

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

HCLTech is seeking a Technical Architect with 10-15 years of experience in Analog/Mixed-Signal Circuit Design and LPDDR Memory Interface Design. The role involves defining interface specifications, leading technical teams, and driving complex issue resolution from architecture through silicon validation.

Responsibilities

Debug simulation and convergence issues.
Identify root causes of functional and performance failures.
Perform design iterations to meet specification targets.
Support sign-off activities including reliability and electrical checks.

Requirements

10-15 years of relevant industry experience in Analog/Mixed-Signal Circuit Design.
Relevant industry experience in LPDDR Memory Interface Design and Architecture.
Deep expertise in LPDDR5/LPDDR6 architecture, protocol, PHY, controller, training, calibration, and low-power operation.
Proven experience defining interface specifications and driving implementation from architecture through silicon validation.
Strong knowledge of JEDEC compliance, timing closure, signal and power integrity, package/board interactions, and performance optimization.
Ability to guide RTL, analog/mixed-signal, verification, physical design, firmware, and validation teams through complex issue resolution.
Expected to lead technical reviews, customer discussions, risk assessment, debug strategy, and mentoring of engineering teams.
Cadence Virtuoso Schematic and Layout
Spectre/AFS/Hspice
ADE Assembler
Voltus/Totem

Desired Qualifications

Layout extraction flow knowledge is good to have
Digital design tools knowledge is good to have
Hands-on experience in one or more of the following technologies is preferred: 180nm, 130nm, 90nm, 40nm

Benefits

Supercharge your potential.
Find your career.
Find your spark.
A place that knows that helping its customers stay on top starts by putting its people first.

Skills

Analog/Mixed-Signal Circuit DesignLPDDR Memory Interface DesignLPDDR5LPDDR6JEDEC compliancetiming closuresignal integritypower integrityCadence VirtuosoSpectreHspiceADE AssemblerVoltusTotem

#Analog/Mixed-Signal Circuit Design#LPDDR Memory Interface Design#LPDDR5/LPDDR6 architecture#protocol#PHY#controller#training#calibration#low-power operation#interface specifications#silicon validation#JEDEC compliance#timing closure#signal integrity#power integrity#package/board interactions#performance optimization#RTL#analog/mixed-signal#verification#physical design#firmware#validation#technical reviews#risk assessment#debug strategy#mentoring#simulation#performance failures#design iterations#sign-off activities#reliability#electrical checks#Cadence Virtuoso#Spectre/AFS/Hspice#ADE Assembler#Voltus/Totem#layout extraction#digital design

About HCLTech

Supercharging progress through technology and innovation

HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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