SRAM Design Engineer, Staff
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is seeking an experienced SRAM Design Engineer, Staff to design and verify SRAM integrated circuits, develop SRAM compilers, and characterize critical metrics. This role requires a Master's degree in Electrical/Electronic Engineering, 3-7+ years of experience in SRAM circuit design, and proficiency with EDA tools and scripting languages. The engineer will drive innovation in memory technology and enhance product performance for global semiconductor customers.
Responsibilities
- Designing and verifying SRAM integrated circuits to ensure robustness and reliability.
- Developing SRAM compilers, including gds and netlist tiling for optimal performance and scalability.
- Characterizing SRAM timing, power, and other critical metrics to meet customer and product requirements.
- Executing compiler quality assurance processes to uphold industry-leading standards.
- Conducting SRAM bitcell analysis and formulating design criteria for advanced memory products.
- Utilizing EDA tools (XA, hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization.
- Collaborating with cross-functional teams to address post-silicon debug and implement improvements.
- Exploring and integrating SP/2P/ROM variety designs into SRAM IP solutions.
Requirements
- Master’s degree in Electrical/Electronic Engineering or a related field.
- 3–7+ years of hands-on experience in SRAM circuit design.
- Prior understanding of CMOS-based block level circuit design and SRAM architectures.
- Experience with SP/2P/ROM variety design and SRAM bitcell analysis.
- Proficiency in digital circuit design and VLSI process concepts.
- Familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell.
- Experience with EDA tools for simulation and design: XA, hspice, Verilog, Starrc, EMIR.
Desired Qualifications
- Post-silicon debug experience is a plus.
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement Plans
- Competitive salaries
#SRAM#Design#Engineer#Staff#Synopsys#Hsinchu#Taiwan#Engineering#Employee#EDA#Electronic Design Automation#Chip Design#Verification#Manufacturing#AI#ML#GenAI#Cloud#Semiconductors#Memory Design#CMOS#Digital Logic#VLSI#SRAM Architectures#Compiler Development#Scripting Languages#EDA Tools#Post-silicon Debug