Sr Staff Engineer - Analog Design
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is seeking an experienced Sr Staff Engineer - Analog Design to architect and design Multi-Gbps SERDES IP for advanced FinFET nodes. The role involves reviewing high-speed standards, designing analog and mixed-signal circuits, collaborating with digital teams and layout engineers, and supporting post-silicon bring-up. Requires over a decade of analog circuit design experience, a proven track record of CMOS tape-outs, and expertise in SERDES sub-circuit design.
Responsibilities
- Review high-speed SerDes standards including PCIe, Ethernet, USB, and CXL, and translate them into transceiver architectures and detailed sub-block specifications for Multi-Gbps NRZ and PAM4 designs
- Architect and design analog and mixed-signal circuits including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and ADC/DAC blocks for advanced FinFET and gate-all-around process nodes
- Collaborate with digital design teams on analog and digital co-design, calibration loops, adaptation algorithms, and timing handoff to ensure seamless integration and optimal performance
- Work directly with layout engineers to guide physical implementation, minimize parasitics, manage device stress and process variation, and ensure robust post-silicon performance
- Present simulation results, design trade-offs, and architectural decisions in internal reviews, customer meetings, and industry panel discussions
- Document design features, simulation methodologies, test plans, and characterization results, and support post-silicon bring-up and debug with electrical analysis and design iteration proposals
- Analyze customer silicon data and field performance to identify improvement opportunities and drive post-silicon design updates for next-generation IP releases
Requirements
- MTech or MS with 8+ years or BTech or BS with 10+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related field
- Proven track record of CMOS tape-outs in FinFET technologies with demonstrable experience in Multi-Gbps high-speed designs using NRZ and PAM4 modulation
- Deep expertise in SERDES sub-circuit design including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and data converters
- Strong understanding of analog and digital co-design, calibration and adaptation algorithms, and timing handoff between analog and digital domains
- Proficiency with schematic entry, physical layout collaboration, design verification tools, and SPICE simulators such as Spectre or HSPICE
- Experience with scripting languages such as TCL, PERL, or MATLAB for post-processing simulation data and automating design tasks
- Solid grounding in system-level budgeting for jitter, amplitude, and noise, and familiarity with signal integrity challenges including packaging parasitics, crosstalk, and channel loss.
Desired Qualifications
- Experience with ESD protection, custom digital design, and design-for-reliability considerations such as electromigration, IR drop, aging, and self-heating is a plus
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement plans that vary by region and country
- Competitive salaries
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