SOC Design Verification Engineer– Pre-Si/Post-Si Verification
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Seeking Engineer and Senior Engineer candidates for a Pre-Silicon and Post-Silicon SoC Verification team. Responsibilities include developing and executing verification plans, building verification environments, and debugging issues across pre-silicon and post-silicon phases. This role offers opportunities to work on next-generation SoCs for mobile, AI, HPC, and cloud products.
Responsibilities
- Develop and execute verification plans for SoC, subsystem, and IP-level features across pre-silicon and post-silicon phases.
- Build, enhance, and maintain SystemVerilog/UVM, C/C++, processor-based, emulation, and acceleration verification environments.
- Create directed, constrained-random, stress, performance, power, and system-level test scenarios.
- Develop assertions, functional coverage models, checkers, scoreboards, and signoff metrics.
- Debug RTL, testbench, emulation, firmware, ATE/vector, and silicon bring-up issues.
- Support post-silicon validation, silicon characterization, ATE/vector debug, failure triage, and correlation.
- Drive coverage closure, regression health, bug tracking, and verification signoff.
- Participate in architecture, micro-architecture, design, validation, and test-plan reviews.
- Verify complex SoC features including multi-core CPU systems, cache coherency, memory subsystems, high-speed interfaces, security, performance, and power-management.
- For Senior Engineer: Own feature/subsystem verification, lead debug, mentor engineers, identify risks, and drive methodology improvements.
Requirements
- Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or related field.
- Engineer: 2+ years of relevant design verification, validation, or SoC debug experience.
- Sr. Engineer: 4+ years of relevant experience with ownership of complex verification, validation, or silicon bring-up deliverables.
- Strong knowledge of System Verilog, UVM, C/C++, assertion-based verification, coverage-driven verification, and system-level use-case verification.
- Experience developing or using verification environments from architecture/specification through signoff.
- Understanding of post-silicon validation concepts like bring-up, ATE/vector debug, silicon failure triage, or hardware/software interaction.
- Strong understanding of computer architecture, digital design fundamentals, and SoC integration concepts.
- Excellent communication, collaboration, ownership, and problem-solving skills.
Desired Qualifications
- Experience with pre-silicon or post-silicon domains such as CPU, subsystem, or full-chip SoC verification.
- Experience with cache coherency protocols (ACE, CHI, CXL).
- Experience with DDR, LPDDR, or HBM memory subsystems.
- Experience with PCIe, CXL, Ethernet, networking, or high-speed interface verification.
- Experience with AI/ML accelerator, security, RAS, performance, or power feature verification.
- Experience with post-silicon bring-up, silicon validation, ATE pattern debug, shmoo/debug analysis, or silicon failure triage.
- Experience with emulation/acceleration platforms (Veloce, Palladium, ZeBu).
- Silicon validation (Debug using Trace32) experience is preferred.
- Experience with Portable Stimulus, formal verification, power-aware verification, firmware-driven validation, or hardware/software co-verification.
- Proficiency in Python, Perl, shell scripting, or other automation languages.
- For Sr. Engineer: Demonstrated ability to lead feature closure, coordinate across teams, mentor engineers, and communicate technical risks.
Benefits
- You will be part of a team developing next-generation Mobile and Data Center Solutions.
- This involves hardware design verification of advanced Wireless, CPUs, Memory architecture, AI Accelerators, and high-speed connectivity technologies.
- This role offers significant growth opportunities.
- Work alongside industry-leading engineers on challenging SoC verification problems.
#ASICS Engineering#SoC Verification#Pre-Silicon Verification#Post-Silicon Verification
Company
Qualcomm
Job Posted
3 weeks ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Mid-Senior
Locations
Tijuana, Mexico
Qualification
Bachelor, Master
Applicants
Be an early applicant