SOC Design Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking a motivated SOC Design Verification Engineer to join their Data Center SoC Verification team in San Diego. This role involves verifying next-generation SoCs for AI, HPC, and cloud infrastructure, working with advanced technologies and collaborating with cross-functional teams to ensure first-silicon success. A Bachelor's or Master's degree and 2+ years of design verification experience with System Verilog, UVM, and computer architecture knowledge are required.
Responsibilities
- Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features.
- Design and implement scalable System Verilog/UVM-based and Processor-based verification environments.
- Create directed and constrained-random test scenarios to validate functionality and architectural use cases.
- Develop assertions, functional coverage models, and checkers.
- Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects.
- Drive coverage closure using functional and code coverage metrics.
- Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle.
- Verify complex Data Center SoC features including multi-core CPU systems, cache coherency, memory subsystems, high-speed interfaces, security, and power-management features.
- Support emulation and acceleration-based verification when required.
- Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows.
Requirements
- Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.
- Minimum 2+ years of design verification experience.
- Strong knowledge of System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification.
- Experience developing verification environments from architecture/specification through signoff.
- Strong understanding of computer architecture and digital design fundamentals.
- Experience debugging complex SoC-level issues.
- Excellent communication and collaboration skills.
Desired Qualifications
- Experience with CPU verification.
- Experience with cache coherency protocols (ACE, CHI, CXL).
- Experience with DDR or HBM memory systems.
- Experience with PCIe, Ethernet, or networking protocols.
- Experience with AI/ML accelerator verification.
- Experience with security and RAS feature verification.
- Experience with System Performance verification.
- Experience with System Power verification.
- Experience with ATE and Post Silicon bring up testing.
- Experience with Portable Stimulus (PSS).
- Experience with Formal Verification.
- Experience with Emulation platforms (Veloce/Palladium/ZeBu).
- Experience with Power-aware verification.
- Proficiency in Python or scripting languages for automation.
- AI-assisted verification of workflows and test generation.
- Experience in full-chip or subsystem verification environments.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support success at work, at home, and at play.
- Significant growth opportunities while working alongside industry-leading engineers.
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