SoC Physical Design Engineer, Staff - HM PD team
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is seeking a Staff SoC Physical Design Engineer with 8-10 years of experience in physical design, synthesis, PnR, and STA. The role involves managing complex subsystems and small teams, focusing on demanding PPA requirements and low-power design implementation on advanced technology nodes.
Responsibilities
- Manage complex subsystems and small teams.
- Experience in synthesis, PnR, sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations.
- Experience with demanding PPA requirement of complex sub-system/SOC, place and route, IP integration.
- Experience in low power design Implementation including UPF, multi-voltage domains, power gating.
- Experience with ASIC design flows and methodology of Physical design.
- Understanding of circuit design, device physics and deep sub-micron technology. Should have worked on multiple TO in advance technology nodes.
- Good understanding of automation to drive the efforts to improve the PPA.
Requirements
- Bachelor's degree in Electrical Engineering with 8 to 10 years of experience in physical design.
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
- Experience managing complex Subsystem and Small team.
- Experience in synthesis, PnR, sign-off convergence, including Static Timing Analysis (STA) and sign-off optimizations.
- Experience with demanding PPA requirement of complex sub-systeM/SOC, place and route, IP integration.
- Experience in low power design Implementation including UPF, multi-voltage domains, power gating.
- Experience with ASIC design flows and methodology of Physical design.
- Understanding of circuit design, device physics and deep sub-micron technology.
- Worked on multiple TO in advance technology nodes.
- Good understanding of automation to drive the efforts to improve the PPA.
#SoC#Physical Design#Hardware Engineering