Senior Staff Physical Design Engineer
Construction, Engineering & Trades · Civil & Industrial Engineering · Mechanical Engineering
In short
Synopsys seeks a Senior Staff Physical Design Engineer with deep expertise in advanced-node physical design and timing closure. You will develop and refine physical design methodologies and automation flows, analyze design data, and collaborate with cross-functional teams to ensure successful silicon delivery for products used by millions.
Responsibilities
- Drive timing closure and signoff readiness for advanced-node designs (5nm, 3nm, and below) at block, subsystem, and full-chip levels.
- Develop and refine physical design methodologies and automation flows using TCL, Python, and Perl.
- Perform static timing analysis, clock-tree synthesis, and ECO implementation using industry-standard tools.
- Analyze design data and PPA trends to identify bottlenecks and optimize workflows.
- Collaborate with cross-functional teams (front-end design, verification, CAD) for successful silicon delivery.
- Contribute to AI-assisted and machine learning-driven design optimization initiatives.
- Troubleshoot complex physical design challenges including congestion and power integrity.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
- 8+ years of hands-on experience in ASIC physical design, implementation, and timing closure.
- Deep expertise with industry-standard implementation tools (Synopsys ICC2, Fusion Compiler, or Cadence Innovus).
- Strong working knowledge of timing, power, and signoff tools (PrimeTime, RedHawk, Formality, etc.).
- Proven ability to develop design flows, methodologies, and automation using scripting languages (TCL, Python, Perl).
- Experience with advanced-node semiconductor design at 7nm or below.
- Exposure to machine learning, AI-assisted design optimization, or data-driven engineering workflows is a strong plus.
Desired Qualifications
- Ability to walk into a timing review with 500 failing paths and create a prioritized plan for signoff.
- Proactive in identifying and fixing broken flows by analyzing data and writing scripts.
- Comfortable explaining complex clock-tree tradeoffs concisely.
- Ability to work well across a global team, coordinating with engineers in multiple time zones.
- Excellent problem solver who can work independently and figure things out from logs and tools.
- Self-motivated and independent, able to own a block or subsystem implementation from floorplan through signoff with minimal supervision.
Benefits
- Comprehensive range of health, wellness, and financial benefits.
- Total rewards include both monetary and non-monetary offerings.
- Potential eligibility for annual bonus, equity, and other discretionary bonuses.
- Competitive total rewards package.
- Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
Skills
PythonTCLPerl
#engineering#physical design#asic#timing closure#automation#advanced-node#silicon#semiconductor
About Synopsys Inc
Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…
Company
Synopsys IncJob Posted
4 days ago
Employment Type
Full Time
Work mode
On Site
Salary
US$157,000–235,000 / year
Experience Level
Senior
Locations
Sunnyvale, United States
Qualification
Bachelor, Master
Applicants
Be an early applicant
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