Senior Lead Physical Design Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm India Private Limited is looking for a Senior Lead Physical Design Engineer to join their Hardware Engineering team in Noida. This role requires extensive experience in physical design and STA within the CPU domain, with a focus on optimizing performance, power, and area (PPA). The ideal candidate will possess a strong understanding of industry-standard tools and deep submicron process technology nodes.

Responsibilities

Plan, design, optimize, verify, and test electronic systems, circuits, digital/analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
Collaborate with cross-functional teams to develop solutions and meet performance requirements.
Perform physical design and STA in the CPU Domain.
Work with industry-standard tools for physical implementation (Genus, Innovus, FC, PT, Tempus, Voltas, redhawk).
Manage the process from floorplan to PRO and timing signoff, including IR drop and physical verification.
Prepare complex ECOs for timing convergence across a huge set of corners using Tweaker/Tempus/Physical PT ECOs.
Minimize power consumption.
Work with deep submicron process technology nodes.
Implement high-performance and low-power designs.
Push PPA to the best possible extent.

Requirements

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
5+ years of experience in Physical design, STA in CPU Domain.
Solid understanding of industry standard tools for physical implementation [Genus, Innovus, FC, PT, Tempus, Voltas and redhawk].
Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect.
Experienced in preparing complex ECOs for timing convergence [across huge set of corners] through Tweaker / Tempus / Physical PT ECOs.
Awareness about tricks for minimizing power.
Strong fundamentals.
Expertise in Perl, TCL language.

Desired Qualifications

Experience in deep submicron process technology nodes is strongly preferred.
Knowledge of high performance and low power implementation methods is preferred.
Willing to push PPA to the best possible extent.

Benefits

Qualcomm is an equal opportunity employer.
Qualcomm is committed to providing an accessible process for individuals with disabilities.
Qualcomm is committed to making its workplace accessible for individuals with disabilities.
Reasonable accommodations will be provided to support individuals with disabilities to be able participate in the hiring process.