RTL Design Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys seeks a highly experienced RTL Design Engineer for an on-site role in Boxborough, MA. The position focuses on designing high-performance digital logic for PHY, DDRIO, and UCIe solutions, requiring expertise in high-speed interfaces. The role involves driving ASIC development through all phases and optimizing designs for performance, power, and area.

Responsibilities

Architect, design, and develop high-performance digital logic for PHY, DDRIO, and UCIe-based solutions.
Define and implement RTL architectures while working closely with verification, physical design, and system teams.
Drive chip- and block-level design activities through all phases of the ASIC development cycle.
Optimize designs for performance, power, area (PPA), and product scalability.
Develop and evaluate complex physical IP solutions, including SERDES and DDR subsystems.
Review designs and mentor engineers to ensure technical excellence and development best practices.
Collaborate with cross-functional teams to deliver high-quality silicon solutions on schedule.

Requirements

BS in Electrical Engineering, Computer Engineering, or related field with 12+ years of relevant experience, or MS with 10+ years of experience.
Strong experience in ASIC RTL design and digital logic development.
Expertise in PHY design, DDRIO, UCIe, SERDES, or related high-speed interface technologies.
Solid understanding of the complete SoC design cycle, from architecture through implementation.
Experience with design verification methodologies and hardware debugging.
Strong problem-solving, analytical, and communication skills.

Desired Qualifications

Experience developing complex IPs for advanced process technologies.
Familiarity with low-power design techniques and clocking architectures.
Experience mentoring engineers and leading technical projects.
Knowledge of industry-standard EDA tools and design methodologies.

Benefits

Comprehensive medical and healthcare plans.
ETO and FTO Programs (Time Away).
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP (Purchase Synopsys common stock at a 15% discount).
Retirement plans.
Competitive salaries.
Annual bonus, equity, and other discretionary bonuses may be eligible.
Comprehensive health, wellness, and financial benefits.

Skills

RTLPHYDDRUCIeSERDESASIC

#Engineering#RTL Design#ASIC#PHY#DDR#UCIe#SERDES

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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