Principal Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

As a Principal ASIC Engineer at Qualcomm in Bangalore, India, you will lead the definition, modeling, design, optimization, verification, validation, and documentation of IP (block/SoC) for high-performance products. You will create advanced architectures, collaborate with cross-functional teams, and provide expert technical guidance throughout the design process.

Responsibilities

Leverages expert ASIC knowledge and experience to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power products.
Creates highly advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
Collaborates with high-level representatives across functional teams (e.g., software architecture, hardware architecture, product management, program management teams) to develop and execute an implementation strategy that meets system requirements and customer needs.
Serves as an expert resource for all aspects of the process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout flow.
Utilizes tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC Packages; provides technical expertise and support to team members.
Writes detailed technical documentation for highly complex EDA/IP/ASIC projects; reviews technical documentation for experienced engineers.

Requirements

Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
12+ years of ASIC design, verification, validation, integration, or related work experience.
4+ years of experience with architecture and design tools.
4+ years of experience with scripting tools and programming languages.
4+ years of experience with design verification methods.
2+ years of work experience in a role requiring interaction with senior leadership (e.g., Vice President level and above).