Pre-Silicon Validation Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems · QA & Testing

In short

Qualcomm is looking for a Pre-Silicon Validation Engineer in San Diego, CA. This role involves developing and maintaining ASIC/FPGA emulation environments, porting RTL designs, and enabling early hardware/software co-validation. The ideal candidate will have experience with SystemVerilog, C/C++, Python, and AI-driven tools for enhanced productivity and debug.

Responsibilities

Develop, deploy, and maintain ASIC/FPGA emulation environments for complex SoC designs.
Port RTL designs onto industry-standard emulation platforms such as Cadence Palladium, Siemens Veloce, or FPGA prototyping systems.
Work closely with RTL, verification, architecture, and software teams to enable early hardware/software co-validation.
Develop testbenches, transactors, and verification infrastructure using SystemVerilog and C/C++.
Analyze and debug functional, performance, and system-level issues in emulation environments.
Create automation scripts and workflows using Python to improve productivity, regression execution, and debug efficiency.
Collaborate with design teams to optimize designs for emulation performance and resource utilization.
Develop methodologies for waveform analysis, signal tracing, and failure root-cause identification.
Apply AI-assisted tools and techniques to accelerate verification, debug, data analysis, and engineering productivity.
Generate technical documentation and present findings to cross-functional teams and leadership.

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
0-2+ years of experience in ASIC verification, FPGA prototyping, or hardware emulation.
Strong expertise in SystemVerilog.
Strong expertise in C/C++.
Strong expertise in Linux environment and shell scripting.
Strong expertise in Python programming.
Strong expertise in ASIC and FPGA Emulation platforms.
Experience with RTL debugging, waveform analysis, and design verification methodologies.
Knowledge of SoC architectures, bus protocols, and hardware/software interactions.
Strong analytical and problem-solving skills.

Desired Qualifications

Experience with Cadence Palladium, Protium, Siemens Veloce, or Synopsys ZeBu platforms.
Familiarity with FPGA implementation flows using Xilinx or Intel FPGAs.
Exposure to AI/ML technologies and AI-powered engineering tools.
Knowledge of PCIe, CXL, DDR, Ethernet, or other high-speed interfaces.
Experience with cloud-based compute environments and large-scale regression management.

Benefits

Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support your success at work, at home, and at play.

Skills

SystemVerilogC/C++LinuxPythonASIC EmulationFPGA PrototypingSoC VerificationHardware/Software Co-ValidationDebugRoot Cause AnalysisAI-Assisted Engineering ToolsAutomationScripting

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