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NOC DV Sr Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

As a NOC DV Sr Engineer at Qualcomm in Bangalore, India, you will be responsible for the verification of next-generation Infrastructure IPs for System-on-chip (SoC). This role involves planning and implementing IP/Cluster/Formal verification flows, coordinating with cross-functional teams, and ensuring quality sign-off for cutting-edge products.

Responsibilities

  • Own DV test bench and associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage).
  • Develop test plans and test cases, cover design feature sets, and follow up with stakeholders on code/functional coverage closure.
  • Work closely with System Architects, Design, and emulation teams on failure debugs and coverage closure.
  • Debug regression signatures and identify bug fixes.
  • Responsible for Quality sign off and required documentation.
  • Develop/Deploy scripts/tools for validation (Certitude, VC Formal, VPlan).
  • Debug and root cause post silicon issues in collaboration with Design, SW, and test teams.
  • Work with SoC level performance modeling team on latency and bandwidth analysis.

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience; OR Master's degree and 1+ year of experience; OR PhD.
  • Experience planning and implementing IP/Cluster/Formal verification flows for Infra IPs.
  • Strong debugging, Analytical and problem-solving skills.
  • Expertise on UVM based verification.
  • Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture.
  • Experience developing Monitors, Scoreboards, Sequencers using scripts, System Verilog, UVM.
  • Communication and collaboration skills to work with a large world-wide design organization.
  • Experience with UVM and ARM Bus protocols.

Desired Qualifications

  • Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse.
  • Experience in verifying designs meeting Automotive Safety Integrity Levels (ASIL).
  • Proficiency in Scripting languages (Python or Perl) for Automation initiatives.
  • Proficiency in C/C++/SystemC for performance models.
  • Post-si bring-up and HW-SW debug experience.
  • Knowledge & exposure to silicon debug tool chains.

Benefits

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.

Skills

System VerilogUVMPythonPerlC++SystemCARMFPGADSP
#Hardware Engineering#IP Verification#SoC#Digital Verification#Embedded Systems
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About Qualcomm

Enabling a world where everyone and everything can be intelligently connected.

Enabling a world where everyone and everything can be intelligently connected.\n\n

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Company

Qualcomm

Job Posted

1 week ago

Employment Type

Full Time

Work mode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

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