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NOC Design Verification Staff Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

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In short

Qualcomm is looking for a NOC Design Verification Staff Engineer in Bangalore, India. This role involves planning and implementing IP/Cluster/Formal verification for Infrastructure IPs like DDRSS and Memory Controllers within System-on-chip (SoC) products. The engineer will own the test bench, develop test plans, debug regressions, and collaborate with cross-functional teams.

Responsibilities

  • Ownership of DV test bench and associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage).
  • Develop test plan and test cases to cover design feature set and ensure functional coverage closure.
  • Work closely with System Architects, Design, and emulation teams on failure debugs and coverage closure.
  • Debug regression signatures and identify bug fixes.
  • Responsible for Quality sign off and required documentation.
  • Developing/Deploying scripts/tools for validation (Certitude, VC Formal, VPlan).
  • Debug and root cause post silicon issues in collaboration with Design, SW and test teams.
  • Work with SoC level performance modeling team on latency, bandwidth analysis.

Requirements

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
  • PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • Experience in verification of next generation Infrastructure IPs (DDRSS, Memory Controllers etc.) for System-on-chip (SoC).
  • Plan and implement IP/Cluster/Formal verification flows for Infra IPs.
  • Coordinate with different Design and SOC teams throughout the IP development cycle.
  • Strong debugging, Analytical and problem-solving skills.
  • Expertise on UVM based verification.
  • Knowledgeable about ARM bus protocols, Virtual Memory concepts, SoC system architecture.
  • Experience in developing Monitors, Scoreboards, Sequencers that utilize scripts, System Verilog, UVM, and methodologies.
  • Communication and collaboration skills to work with a large world-wide design organization.
  • Bachelor/Master’s Degree in Electronics & Communication / Micro Electronics.
  • 8 Years of Experience in IP verification or related.
  • Experience with UVM and ARM Bus protocols.

Desired Qualifications

  • Designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse.
  • Verifying designs meeting Automotive Safety Integrity Levels (ASIL).
  • Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models.
  • Post-si bring-up and HW-SW debug experience.
  • Knowledge & exposure to silicon debug tool chains.

Benefits

  • Qualcomm is an equal opportunity employer.
  • Qualcomm is committed to providing an accessible process for individuals with disabilities.
  • Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#NOC#Design Verification#Staff Engineer#Hardware Engineering#SoC#IP Verification#Infrastructure IPs#DDRSS#Memory Controllers
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Company

Qualcomm

Job Posted

2 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Mid-Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

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