Master Thesis: Advanced IP Netlist Power Regression and AI-Ready Analytics Framework

Technology, Data & Digital · Software & Web Development · Software Engineering · Data Science · Embedded Systems

In short

Master Thesis opportunity to develop an automated, AI-ready post-processing and interpretation framework for IP-level netlist power analysis and optimization. The role involves building a drop-triggered power regression system, generating GLS collateral, and implementing an in-house analytics and AI-ready interpretation layer with an HTML dashboard.

Responsibilities

  • Build a drop-triggered power regression that selects the method per IP (GLS-based or vectorless).
  • For key IPs, generate and validate GLS collateral (replay testbenches, sanity checks).
  • Deliver an in-house analytics layer ingesting FusionCompiler and PTPX/PrimePower prelayout results.
  • Implement an AI-ready interpretation layer over the structured dataset (PTPX reports → normalized schema / Parquet artifacts).
  • Develop an HTML dashboard presenting analysis results for shared access.

Requirements

  • Master´s student in Electrical/Computer Engineering, Computer Science or similar.
  • Background in Computer architecture.
  • Background in ASIC design.
  • Background in RTL HDL coding.
  • Background in testbench design using SystemVerilog.
  • Working knowledge of UVM.
  • Scripting (Tcl/Python) for EDA tools is preferred.

Desired Qualifications

  • AI-ready interpretation layer with two capability tiers: Tier 1 (core) for deterministic queries and Tier 2 (assistive) for correlation and hypothesis generation.
  • HTML dashboard rendering hierarchical treemaps, pie charts, and trend lines.

Benefits

  • Outstanding opportunity to use your skills and imagination to push boundaries.
  • Chance to build solutions never seen before.
  • Join a team of diverse innovators.
  • Be part of crafting what comes next.
#ASIC backend#netlist generation#power analysis#regression#AI#analytics#framework#frontend#GLS#RTL power tools#SpyGlass-Power#synthesis#FusionCompiler#PTPX#PrimePower#prelayout#treemaps#switching activity#clock-gating#dCGE#QoR#Parquet#natural-language#queries#columnar dataset#retrieval#filtering#ranking#threshold reports#optimization#datapath#glitch hotspots#operating point#idle#active windows#HTML dashboard#pie charts#trend lines#Electrical Engineering#Computer Engineering#Computer Science#Computer architecture#scripting
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Company

Ericsson

Job Posted

1 day ago

Employment Type

Internship

WorkMode

On Site

Experience Level

Student

Locations

Stockholm, Sweden

Qualification

Master

Applicants

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