The Job

LPASS Design Verification Sr Lead Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

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In short

Qualcomm India Private Limited is seeking an LPASS Design Verification Sr Lead Engineer in Bangalore, India. This role involves ownership of features in the Low Power Audio Subsystem (LPASS) core, developing testbenches, and exploring innovative DV methodologies to ensure bug-free silicon for Snapdragon devices.

Responsibilities

  • DV ownership of one or more features in the Low power audio subsystem (LPASS) core
  • Developing a robust testbench, optimized for the specific feature/DUT
  • Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements
  • Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices

Requirements

  • Minimum 1 - 2 years of VLSI industry experience
  • Strong debugging and analytical skills
  • Strong knowledge of HDLs like Verilog, System Verilog
  • Proficiency in developing SV/UVM based test benches
  • Proficient in debugging RTL/TB issues using Verdi or similar tools
  • Proficient with scripting languages such as Perl and(or) Python

Desired Qualifications

  • Knowledge of UPF, low power architecture
#Hardware Engineering
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Company

Qualcomm

Job Posted

1 month ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor

Applicants

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