The Job

Layout Design, Sr Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

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In short

Synopsys is seeking a Sr. Layout Design Engineer in Da Nang, Vietnam to design and develop cutting-edge semiconductor solutions. This role involves creating intricate chip architectures, circuit designs, and verification processes, focusing on layout optimization for performance, power, and reliability.

Responsibilities

  • Design custom layouts for memory and standard cell IP using Custom Compiler, translating circuit schematics into physical structures that meet performance, power, and area targets.
  • Run and debug physical verification flows using ICV or Calibre, resolving DRC, LVS, and ERC violations with an understanding of root cause.
  • Analyze layout parasitics and perform EMIR checks to ensure designs meet electrical and reliability requirements.
  • Collaborate with circuit designers to understand design intent, device sizing, and matching requirements, then implement layouts that preserve those goals.
  • Build and refine layout cells that integrate cleanly into larger IP blocks, ensuring hierarchy, pin placement, and routing consistency.
  • Support bring-up and characterization activities by investigating layout-related issues flagged during post-silicon validation.

Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field.
  • 2+ years of hands-on experience in custom layout, standard cell layout, or memory layout design.
  • Strong knowledge of MOSFET and FinFET device characteristics, P-N junctions, resistors, capacitors, antenna effects, and EMIR analysis.
  • Proficiency with Custom Compiler and physical verification using ICV, Calibre, or similar platforms.
  • Solid skills in DRC, LVS, and ERC debugging, with the ability to trace issues back to layout or netlist source.

Desired Qualifications

  • You approach layout with a designer's mindset, understanding circuit intent and using that knowledge to make better layout decisions.
  • You do not stop at clean DRC and LVS. You ask whether the layout actually supports the electrical performance the circuit needs.
  • You are comfortable working across tools and flows, moving between Custom Compiler, verification platforms, and parasitic extraction without losing momentum.
  • You communicate clearly with circuit designers and verification engineers, translating layout constraints into terms that help the team make better tradeoffs.

Benefits

  • Comprehensive medical and healthcare plans that work for you and your family.
  • ETO and FTO Programs.
  • Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
  • Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
  • Retirement plans that vary by region and country.
  • Competitive salaries.
#layout#engineering#semiconductor#VLSI
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Company

Synopsys Inc

Job Posted

4 weeks ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Da Nang, Vietnam

Qualification

Bachelor, Master

Applicants

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