Layout Design Sr Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Synopsys is looking for a Sr. Layout Design Engineer in Ho Chi Minh City to design and develop custom layouts for Embedded Memory IPs, Standard Cells, and IO structures using industry-standard tools. The role involves optimizing layouts for density, performance, power, and manufacturability, collaborating with cross-functional teams, and debugging complex design violations.

Responsibilities

Design and develop custom layouts for Embedded Memory IPs, Standard Cells, and IO structures using proficiency with Cadence Virtuoso Layout Suite, Synopsys Custom Compiler, and Calibre DRC/LVS verification tools.
Optimize layout topologies for density, performance, power, and manufacturability across advanced process nodes.
Collaborate with circuit designers and verification teams to ensure layouts meet electrical and physical design requirements.
Debug and resolve DRC, LVS, and antenna violations in complex hierarchical designs.
Develop and refine layout methodologies and automation flows to improve efficiency across the IP portfolio.
Participate in design reviews and provide technical feedback on layout strategies.
Maintain documentation of layout guidelines, design decisions, and process updates.

Requirements

Bachelor's or Master's degree in Electronics Engineering, Telecommunication, Physics, or related field.
2+ years of hands-on experience in custom IC layout design, with focus on memory compilers, standard cells, or analog/mixed-signal blocks.
Deep understanding of layout fundamentals including device matching, parasitic extraction, electromigration, and IR drop.
Proficiency with industry-standard layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or equivalent.
Solid grasp of DRC/LVS verification flows and ability to debug complex rule violations.
Strong documentation and communication skills for cross-functional collaboration.

Desired Qualifications

You approach layout as a craft and care about producing work that is clean, efficient, and maintainable.
You can explain a layout tradeoff to a circuit designer in two minutes and walk away with alignment.
You are detail-oriented without losing sight of the bigger picture.
You work well independently but know when to ask for input or flag potential issues early.
You stay current with layout techniques and actively look for ways to improve your methods.

Benefits

Comprehensive medical and healthcare plans.
ETO and FTO Programs.
Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
Retirement Plans.
Competitive salaries.

Skills

Cadence Virtuoso Layout SuiteSynopsys Custom CompilerCalibre DRC/LVS

#Engineering#Layout Design#Embedded Memory IPs#Standard Cells#IO structures

About Synopsys Inc

Smart, Secure Everything—From Silicon to Software Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at…

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