High-Bandwidth Memory (HBM) System Validation Lead (AI Accelerator Platform)
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking an experienced Memory System Validation lead for its AI Accelerator platforms. This role involves defining and executing validation strategies for high-bandwidth memory subsystems, covering both pre- and post-silicon phases. The ideal candidate will lead memory bring-up, performance characterization, reliability analysis, and complex system debugs.
Responsibilities
- Own end-to-end HBM validation strategy from emulation through production silicon.
- Develop comprehensive validation plans for memory initialization, training flows, power-state transitions, reliability testing, error recovery, manufacturing diagnostics, and RAS.
- Drive pre-silicon and first-silicon memory bring-up and root-cause analysis of failures.
- Validate interaction between HBM, AI accelerators, compute fabrics, cache hierarchy, and NoC infrastructure.
- Develop stress scenarios representing real-world AI workloads.
- Lead complex silicon debug efforts, analyzing crashes, hangs, data corruption, training failures, and performance bottlenecks.
- Collaborate with memory architecture, PHY, firmware, package, SI/PI, and AI software teams.
- Develop scalable automation frameworks for memory validation.
- Build telemetry, analytics, debug, and performance-monitoring tools.
- Leverage AI-assisted validation and debug methodologies.
Requirements
- BS/MS/PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- 8+ years of experience in memory validation, silicon validation, or platform bring-up.
- Strong understanding of DDR4/DDR5/LPDDR5/LPDDR6 architectures, HBM technologies, memory controllers, PHY architectures, cache and coherency systems.
- Experience with pre-silicon validation, FPGA platforms, and post-silicon bring-up.
- Strong debugging skills using logic analyzers, protocol analyzers, performance counters, and firmware traces.
- Programming experience in Python, C/C++.
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Desired Qualifications
- Prior experience validating HBM2, HBM3, HBM3E, Advanced stacked-memory technologies.
- Experience with AI accelerator, GPU, HPC, or server-class platforms.
- Familiarity with NoCs, Chiplets, Coherent interconnects.
- Knowledge of Signal Integrity (SI), Power Integrity (PI), Thermal characterization, and Package-level interactions.
- Experience defining validation methodologies for first-generation memory technologies.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support success at work, at home, and at play.
- Recruiter will discuss all that Qualcomm has to offer.
Skills
DDR4DDR5LPDDR5LPDDR6HBMPythonC/C++Signal IntegrityPower Integrity
#AI#HBM#SoC#validation#silicon
About Qualcomm
Enabling a world where everyone and everything can be intelligently connected.
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
14 hours ago
Employment Type
Full Time
Work mode
On Site
Salary
US$174,400–261,600 / year
Experience Level
Senior
Locations
San Diego, United States of America
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant
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