DFT Staff Engineer- SoC Engineering
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys seeks a hands-on DFT Staff Engineer to drive test architecture and implementation for complex SoCs. This role involves owning DFT architecture, defining test strategies, and collaborating with cross-functional teams to ensure testability and yield targets are met. The ideal candidate has a Bachelor's or Master's degree and at least 5 years of SoC DFT experience.
Responsibilities
- Own DFT architecture, implementation, integration, and verification for complex SoCs and subsystems from specification through tapeout.
- Define and execute test strategies across scan insertion and ATPG, memory BIST, logic BIST, and analog/PHY test considerations.
- Drive DFT signoff readiness by identifying testability risks early, proposing design changes, and ensuring closure across the RTL-to-GDS flow.
- Develop and institutionalize reusable DFT methodologies, checklists, and guidelines using Synopsys EDA tools.
- Partner with silicon validation and test engineering teams on post-silicon debug, failure analysis triage, and pattern refinement.
- Collaborate closely with RTL design, functional verification, physical design, timing, and power teams to ensure testability is designed in.
- Provide technical guidance to peers through design reviews, integration/debug support, and best-practice sharing.
Requirements
- Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field.
- Typically 5+ years of hands-on SoC DFT experience with proven depth in scan/ATPG, memory BIST, logic BIST, and analog test considerations.
- Strong understanding of the end-to-end SoC design flow from microarchitecture through RTL, verification, synthesis, timing/physical implementation, and signoff.
- Demonstrated experience owning DFT implementation for complex SoCs that have taped out and gone to production.
- Proven ability to work cross-functionally to resolve testability issues and drive closure under schedule constraints.
Desired Qualifications
- Strong working knowledge of Synopsys DFT tools such as TetraMAX, DFT Compiler, and BIST Architect is a plus.
- Post-silicon debug experience and collaboration with test engineering teams to refine production test programs is a plus.
- Ability to quickly identify untestable logic or weak test hooks and propose practical fixes that teams will adopt.
- Comfortable leading technical discussions with architects and pushing back when decisions introduce coverage gaps or yield risk.
- High ownership and ambiguity tolerance, able to define a path forward with incomplete information.
- Ability to share expertise through hands-on collaboration, reviews, and problem-solving.
- Ability to communicate clearly, translating DFT tradeoffs into schedule/cost/yield impact for stakeholders.
- Stay current with evolving DFT techniques.
Benefits
- Comprehensive medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
- Retirement plans.
- Competitive salaries.
#SoC Engineering#DFT#Staff Engineer
Company
Synopsys Inc
Job Posted
1 week ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Noida, India
Qualification
Bachelor, Master
Applicants
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