Design Verification Engineer ASIC Developer
Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing
In short
Ericsson Silicon seeks an experienced Design Verification Engineer in Austin, Texas, to architect and verify custom IPs, ASICs, SoCs, and FPGA platforms using AI-driven methodologies. This role involves pioneering AI agentic workflows for test generation, debug, and coverage closure, working on cutting-edge designs for communication infrastructure and accelerators.
Responsibilities
- Define Verification Strategies for complex Layer 1 accelerator ASICs, SoCs, and FPGA platforms.
- Architect reusable UVM-based verification environments using SystemVerilog, integrating LLM-assisted test generation.
- Deploy and develop AI agentic frameworks for autonomous triage of regression failures and log analysis.
- Drive functional, code, and assertion coverage closure using ML-guided techniques.
- Automate and optimize CI/CD pipelines using Python, Tcl, shell scripting, Jenkins, and Git.
- Verify RTL and gate-level designs across simulation, emulation, FPGA prototyping, and post-silicon environments.
- Leverage AI-assisted log analysis for debugging intricate issues.
- Validate performance and functionality across proprietary interfaces, AMBA, PCIe, DDR, Ethernet, and SerDes.
- Contribute to verification methodology evolution, embedding generative AI and automation tools.
- Mentor junior engineers on verification techniques and modern AI tools.
Requirements
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical discipline.
- 6+ years of professional design verification experience for complex ASIC, SoC, FPGA, or semiconductor products.
- Strong programming experience with SystemVerilog/Verilog.
- Hands-on expertise developing and maintaining UVM-based environments.
- Deep understanding of constrained-random verification, assertion-based verification, scoreboards, checkers, and coverage-driven signoff.
- Strong scripting and automation skills using Python, Tcl, Perl, or shell scripting.
- Experience with Git, Jenkins, and CI/CD pipelines.
- Understanding of SoC/ASIC architectures, with exposure to Layer 1 accelerators, DSPs, AI/ML accelerators, RISC-V, or ARM Cortex processors.
- Experience verifying standard interfaces such as AMBA AXI/AHB/APB, PCIe, DDR, Ethernet, or SerDes.
- Strong written and verbal communication skills with proven track record of cross-functional collaboration.
Desired Qualifications
- Practical experience integrating LLMs, custom coding assistants, or autonomous AI agents into hardware design, test generation, or debug loops.
- Experience building custom Python-based automation frameworks that interface with EDA APIs or parse large-scale regression datasets using machine learning.
- Experience with formal or semi-formal verification tools such as JasperGold.
- Knowledge of clock-domain crossing (CDC), reset-domain crossing (RDC), low-power verification (UPF/CPF), or simulation-to-silicon correlation.
- Exposure to C/C++, assembly (RISC-V/ARM), or hardware-software co-verification.
- Familiarity with Jira, Confluence, and Agile development methodologies in semiconductor environments.
Benefits
- Opportunity for an annual bonus based on business and individual performance.
- Choice of three medical plan options and a dental plan option.
- Company credits for medical and dental premiums.
- 401(k) Plan with automatic 3% company contribution and 4% match.
- Company credits for basic life insurance, AD&D, short-term and long-term disability coverage.
- Optional participation in Ericsson’s Stock Purchase Plan.
- Minimum of 15 days of accrued vacation.
- Up to 3 personal days per year.
- 11 annual holidays.
- 8 hours of volunteer time.
- 80 hours of sick time annually.
- Up to 16 weeks of paid maternity leave.
- 6 weeks of parental or adoption leave at 100% of pay.
- Financial wellness programs.
- Educational assistance.
- Matching gifts.
- Recognition programs.
Skills
SystemVerilogVerilogUVMPythonTclPerlshell scriptingJenkinsGitCI/CDLLMRISC-VARMAMBAPCIeDDREthernetSerDesC++JiraConfluence
#ASIC#AI#Agentic Workflows#Custom Silicon#Layer 1 Accelerators#DSP#RISC-V#ARM#High-Speed Interfaces#Verification
Our purpose \nTo create connections that make the unimaginable possible.\n\nOur vision\nA world where limitless connectivity improves lives, redefines business and pioneers a sustainable future.\n\nOur values\nPerseverance, professionalism, respect and integrity.\n\nThe future is a place for purpose & vision – ours are clear, and we invite partners, customers and consumers to join us in our journey. \n\nFor a brighter future. For all. Let's #ImaginePossible
Company
EricssonJob Posted
14 hours ago
Employment Type
Full Time
Work mode
On Site
Experience Level
Senior
Locations
Austin, United States
Qualification
Bachelor, Master
Applicants
Be an early applicant
Similar Jobs
Saab
Solna, SwedenMaster Thesis - Secure AI-driven software engineering
Internship Be an early applicant Posted 4 days ago
Scania Group
Ljubljana, SloveniaSales Support - MAN Financial Services
Full Time Be an early applicant Posted 4 days ago
Emerson
Eger, HungaryMechatronic Design Engineer (Sustaining Engineering)
Full Time Be an early applicant Posted 4 days ago
Volvo Cars
Košice, SlovakiaDevOps Engineer (VCK)
€2.5k/mo Full Time Be an early applicant Posted 4 days ago
Ericsson
Stockholm, SwedenMaster Thesis: Open Knowledge Format
Internship Be an early applicant Posted 3 days ago
Qualcomm
Cambridge, United KingdomCPU Design Verification Engineer (Senior level)
Full Time Be an early applicant Posted 3 days ago
