Compute DSP/AI Subsystem Validation Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems · Data Science
In short
Qualcomm is looking for a Compute DSP/AI Subsystem Validation Engineer in Markham, Ontario. This role involves IP verification, debugging, and developing test plans for next-generation AI/ML and video processing IP across pre- and post-silicon phases. The position requires experience in C, C++, Python, embedded software development, and familiarity with Windows/Linux environments.
Responsibilities
- Contribute to IP verification during the pre/post silicon phase of next generation SOC
- Collaborate with design and software teams to debug and resolve issues
- Design and translate high-level customer use cases to hardware-specific verification plans
- Develop and automate test plans; refactor and optimize test code
- Manage validation and testing of the driver/hardware
- Migrate/integrate cross-team drivers to new platforms as required for testing
- Deliver low-level hardware drivers for Qualcomm Snapdragon Subsystems validation
- Support post-silicon bring-up, functional, and performance testing
- Perform power correlations, analysis, and reporting
Requirements
- Minimum of 1-3 years of experience
- Experience in low-level and/or embedded software development in C, C++, Assembly, and Python
- Experience with Windows and Linux OS environments
- Experience in ARM, DSP processors, Windows/Linux environments
- Experience in automation and test/integration methodologies
- Experience developing/enhancing validation methodologies and infrastructure solutions
- Experience with SCM tools (Git, Perforce), and defect tracking (JIRA)
- Good communication skills (written and verbal)
- Strong debug skills
Desired Qualifications
- Bachelor's degree in Science, Engineering, or related field
- Experience with digital and analog circuit is a strong asset
- Developing and optimizing test framework and tools to create a controlled validation environment to support large-scale validation
- Designing and defining new validation strategy as well as detailed test plans
- Help debug efforts for issues found during Pre-silicon (FPGA) and Post-silicon
- Define, design, and execute platform Pre-Silicon and Post-Silicon validation plans for current and future products
- Debug hardware/software issues using Lauterbach Trace32 (T32) for register access, memory analysis, and automation
- Experience with low-power modes, power/performance characterization, and correlation analysis
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support success at work, at home, and at play
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