ASICS Design Verification Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is seeking an ASICS Design Verification Engineer in San Diego, CA. This role involves pre-silicon test planning, testbench development, and verification methodology using SystemVerilog-UVM. You will also work on coverage, assertion models, formal verification, and power-aware UPF verification.
Responsibilities
- Responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support.
- Comprehensive pre-silicon test planning for digital power IP's.
- Testbench development using advanced verification methodology such as SystemVerilog-UVM.
- Coverage development, assertion model development, and formal verification (property checking).
- Learn and deploy power-aware UPF verification flow and methodology.
- Involve in developing automation to improve verification efficiency.
Requirements
- Bachelor's degree in Engineering, Science, or a closely related field
- 1+ years of experience with ASIC design and verification tools, techniques, and methodology
Desired Qualifications
- Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field
- 2+ years of experience with ASIC design and verification tools, techniques, and methodology
- 2+ years of experience with digital design concepts and RTL languages such as SystemVerilog or Verilog, or VHDL.
- 2+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
- 2+ years of experience with developing block-level testbench environment using SystemVerilog
- 2+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
- 2+ years of experience with scripting/automation skills using either Perl or python
- Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
- Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package designed to support your success at work, at home, and at play.
- Reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
- Accessible workplace for individuals with disabilities.
Skills
SystemVerilogUVMVerilogVHDLC++CPerlPythonAXIAHBAPB
#ASIC#Design#Verification#Engineer#Qualcomm#San Diego#California
About Qualcomm
Enabling a world where everyone and everything can be intelligently connected.
Enabling a world where everyone and everything can be intelligently connected.\n\n
Company
QualcommJob Posted
4 days ago
Employment Type
Full Time
Work mode
On Site
Salary
US$101,400–152,200 / year
Experience Level
Associate
Locations
San Diego, United States of America
Qualification
Bachelor
Applicants
Be an early applicant
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