ASIC Design Engineer, Low Power Audio AI Subsystems

Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems

In short

Qualcomm is seeking an ASIC Design Engineer for its Low Power Audio AI Subsystems team. This role involves developing and optimizing ultra-low power AI subsystems for audio applications, pushing innovation in performance and features. The engineer will work with cutting-edge hardware design technology and contribute to next-generation initiatives.

Responsibilities

  • Develop micro-architecture and module specifications for digital audio and AI IP blocks.
  • Implement modules and sub-systems and integrate IP from other teams in Verilog RTL.
  • Analyze performance, area, power, and system cost tradeoffs.
  • Review opportunities for power optimization for ultra-low power designs.
  • Conduct power projection activities and scenario exploration.
  • Collaborate with the design verification team to debug tests at module, sub-system, and SoC levels.
  • Work with the implementation team to review synthesis results and power metrics.
  • Perform analysis with the silicon debug team to correlate functional and power objectives.

Requirements

  • Bachelor's degree in Science, Engineering, or related field.
  • 0-2 years of ASIC hardware design and/or implementation experience.
  • Proficiency in Verilog/VHDL RTL design languages.
  • Understanding of ASIC/VLSI concepts.
  • Experience in logic synthesis using Synopsis and/or Cadence tools.
  • Ability to work legally in Canada.

Desired Qualifications

  • 2 years of ASIC hardware design related experience.
  • Experience with power analysis, power modeling, and low power RTL design.
  • Experience with clock domain crossing techniques.
  • Power and performance experience with an audio IP core, DSP, various audio interfaces (I2S, PCM, SLIMbus, SoundWire, Audio Codec), and accelerators (low-power AI/ML inference).
  • Experience with tools such as DC, FC, PTPX, Power Compiler, Primetime, Modeltech, VCS, power theatre.
  • Experience with design rule check (Spyglass, etc.), Formal verification (Formality, LEC, etc.), and/or Power analysis and simulation.
  • Scripting skills (Python, PERL, TCL or C).
  • Knowledge of bus interface protocols (APB, AHB, AXI).
  • Experience with post-silicon debug.
  • Experience with UVM.
  • C coding experience.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support success at work, at home, and at play.

Skills

VerilogVHDLPythonPERLTCLCC++UVMAXIAHBAPBI2SPCMSLIMbusSoundWire
#ASIC#Low Power#Audio#AI#Subsystems#SoC#IP#RTL#Verilog#VHDL#Performance#Power Analysis#Optimization#Synthesis#Timing Closure#Silicon Debug
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About Qualcomm

Enabling a world where everyone and everything can be intelligently connected.

Enabling a world where everyone and everything can be intelligently connected.\n\n

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Company

Qualcomm

Job Posted

4 days ago

Employment Type

Full Time

Work mode

On Site

Salary

US$90,100–135,100 / year

Experience Level

Entry

Locations

Markham, Canada

Qualification

Bachelor

Applicants

Be an early applicant