Analog design, Sr Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Synopsys is looking for a Sr Staff Engineer to design analog circuits for high-speed IO blocks, PLLs, DLLs, and calibration circuits for UCIe and die-to-die PHY products. This role involves collaborating with layout and digital teams, analyzing signal and power integrity, and leading design reviews, with a focus on enabling next-generation AI accelerators, data center processors, and 5G infrastructure.
Responsibilities
- Design analog circuits for high speed IO blocks (CTLE, FFE, TCOIL, DFE …) PLL, DLL, bandgap references, clock trees, and calibration circuits for UCIe and die-to-die PHY products
- Collaborate with layout engineers to ensure design intent translates into clean layout, then run post-layout verification to confirm performance holds
- Analyze and solve signal integrity, power integrity, noise, and margin issues across complex mixed signal systems
- Work with digital and system engineers to integrate analog blocks into full PHY designs and run mixed signal verification
- Design testchip architectures to validate circuits, then build test cases and run silicon bring-up in the lab to prove the design works in hardware
- Lead design reviews with global teams and mentor junior engineers on circuit design, layout collaboration, and verification
Requirements
- BS, MS, or PhD in Electronics Engineering, Electromechanics, or Telecommunications
- 8+ years of hands-on experience designing high speed mixed signal PHY circuits with a track record of designs that have taped out and worked in silicon
- 3+ years leading design teams, managing projects, or owning full design blocks from spec to silicon
- Deep understanding of analog circuit design fundamentals including noise analysis, signal integrity, power integrity, and layout effects
- Strong English communication skills for presenting design reviews, writing documentation, and collaborating with global teams
Desired Qualifications
- Experience with academic research or publishing is a plus
Benefits
- Competitive salaries
- Comprehensive medical and healthcare plans
- ETO and FTO Programs
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back
- Retirement Plans that vary by region and country
#Analog Design#Sr Staff Engineer#Semiconductor#Hardware Engineering#Chip Architecture#Circuit Design#Verification
Company
Synopsys Inc
Job Posted
1 day ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Ho Chi Minh City, Vietnam
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant