Voltage Regulator (VR) Architect
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is looking for an experienced Voltage Regulator (VR) Architect to lead the development of next-generation power delivery solutions for AI, HPC, mobile, automotive, and data center platforms. The role requires deep expertise in power electronics, analog and mixed-signal circuit design, and voltage regulator architectures, with a focus on system-level optimization for efficiency, density, and cost.
Responsibilities
- Define voltage regulator and power delivery architectures for future-generation products.
- Lead architecture, design, and evaluation of advanced power conversion solutions.
- Drive system-level optimization of power efficiency, transient response, power density, thermal performance, reliability, and total cost.
- Develop and evaluate analog control architectures, compensation schemes, feedback loops, and stability methodologies.
- Collaborate with silicon, package, board, PDN, thermal, and system architects.
- Lead technology assessments and roadmaps for emerging power delivery technologies.
- Interface with foundries to enable integrated voltage regulator solutions.
- Drive co-optimization of process technology, silicon implementation, package integration, and PDN architecture.
- Partner with external vendors and ecosystem partners to influence future regulator technologies.
Requirements
- M.S. or Ph.D. in Electrical Engineering with emphasis in Power Electronics, Analog IC Design, Power Management, or related field.
- 10+ years of experience in voltage regulator, PMIC, power management, or power delivery architecture.
- Deep expertise in Power Electronics.
- Deep expertise in Analog and Mixed-Signal Circuit Design.
- Deep expertise in Control Theory and Loop Compensation.
- Deep expertise in DC-DC Converter Design.
- Deep expertise in Multiphase Voltage Regulators.
- Deep expertise in Integrated Voltage Regulators (IVRs).
- Deep expertise in Power Delivery Networks (PDNs).
- Deep expertise in Power Integrity and Transient Analysis.
- Deep expertise in Efficiency Optimization.
Desired Qualifications
- Experience with AI, HPC, GPU, CPU, or data-center power delivery systems supporting hundreds to thousands of amps.
- Direct experience implementing on-chip or near-die IVRs.
- Experience working with leading foundries such as TSMC, Samsung, or Intel Foundry.
- Knowledge of advanced CMOS, FinFET, GAA, backside power delivery, and advanced packaging technologies.
- Experience with package-board-silicon co-design and System Technology Co-Optimization (STCO).
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support success at work, at home, and at play.
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