Synthesis- Lead /Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm seeks a Lead/Staff Engineer in Chennai, India, to lead synthesis and low power implementation for complex SoCs. The role involves optimizing power, performance, and area, collaborating with DFT and Physical Design teams, and profiency in scripting languages.
Responsibilities
- Responsible for Synthesis and low power implementation bring up of power complex SoC.
- Work with design to bring out pre layout timing challenges and constraint feedback.
- Proficient with pre and post layout netlist low power qualification for SoC flat and Sub system level.
- Closely collaborate with DFT team for enabling latest MBIST and DFT scan insertion.
- Closely work with Physical Design (PD) to bring out low power implementation issues and fixes.
- Mentoring junior engineers in different areas of timing flows and methodologies.
Requirements
- Knowledgeable with physical and power aware synthesis techniques, and fluent with multi voltage designs.
- Knowledgeable with balancing between power, performance, area and verification priority approaches at synthesis.
- Proficient in scripting languages (TCL, Perl, Python, shell).
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- 7+ yrs of experience
Desired Qualifications
- Good knowledge on design data management aspects such as perforce and clearcase.
- Logical equivalence check between RTL to Netlist and Netlist to Netlist.
- Knowledgeable with physical and power aware implementation techniques, and fluent with multi voltage designs.
- Knowledgeable with lower tech node timing derating and
#SoC#Hardware Engineering#Synthesis#low power implementation#DFT#Physical Design#scripting