STA/Timing and Physical Design Engineer (Senior/Lead) - Modem Team
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm seeks a Senior/Lead STA/Timing and Physical Design Engineer for their Modem Team in Bangalore. This role involves driving timing analysis and closure for advanced Modem SoCs, working closely with RTL, Physical Design, DFT, and CAD teams to achieve timing signoff. The ideal candidate will have strong hands-on experience in STA, timing closure, MMMC, SDC, ECO, and expertise in Synopsys PrimeTime/Cadence Tempus, with scripting skills in Tcl/Perl/Python.
Responsibilities
- Perform block/full Modem STA and timing closure across MMMC scenarios.
- Drive setup/hold closure, ECO implementation, and timing signoff.
- Analyze timing at each Netlist to GDS stage.
- Collaborate with RTL, PD, and DFT teams to resolve timing issues.
- Analyze noise, crosstalk, OCV/AOCV impacts and optimize critical paths.
- Validate timing constraints (SDC).
- Automate timing flows using Tcl/Perl/Python scripts.
Requirements
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
- 2–6 Years of experience from product-based companies.
- B.E/M.E in ECE, EE, VLSI, Microelectronics, or related fields with strong academic credentials.
- Strong hands-on experience in STA, Timing Closure, MMMC, SDC, ECO.
- Expertise in Synopsys PrimeTime/PTPX and Cadence Tempus.
- Good understanding of Digital Design, Synthesis, Physical Design, CTS, and Routing.
- Scripting skills in Tcl/Perl/Python.
- Having Physical Design experience and candidate looking for PD and STA combined ownership can apply.
Desired Qualifications
- Experience with advanced technology nodes is preferred.
#STA#Timing#Physical Design#Modem#SoCs#Hardware Engineering#RTL#DFT#CAD#Synopsys PrimeTime#Cadence Tempus#Tcl#Perl#Python