Staff/Senior Staff Physical Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm seeks a Staff/Senior Staff Physical Design Engineer to lead technical aspects of physical implementation for advanced FinFET nodes. Responsibilities include defining backend design methodology, integrating AI into the physical design flow, and mentoring team members while interfacing with foundries and EDA vendors.
Responsibilities
- Define, model, design, optimize, verify, validate, and implement IP (block/SoC) development for high performance, high quality, low power products.
- Lead the design implementation of advanced design rules and processes for electronic hardware, equipment, and/or integrated circuitry.
- Conduct complex simulations and analyses of designs, optimizing for power, performance, and area.
- Collaborate with cross-functional teams to implement new requirements and incorporate test solutions.
- Evaluate all aspects of complex process flow from high-level design to synthesis, place and route, timing, power use, and verification.
- Utilize tools/applications (e.g., RTL to GDS Flow) for advanced architecture and design of complex blocks/SoC or IC Packages.
- Write and review detailed technical documentation for complex EDA/IP/ASIC projects.
Requirements
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science with 12+ years of experience.
- Deep expertise in full-chip and block-level floorplanning, design implementation through place and route, clock architecture, STA, Timing/Power closure, and Physical sign-off.
- Experience with power optimization (DVFS, multi-Vt, power domains, UPF/CPF).
- Expert proficiency in EDA tools from Cadence/Synopsys/Mentor/Ansys.
- Advanced Shell, Python, and Tcl scripting: ability to architect large-scale PD automation frameworks and flow infrastructure.
- Proven experience in flow development: designing, implementing, and owning end-to-end backend design flows at team or organization level.
- Demonstrated experience or vision for applying Agentic AI methodologies to EDA challenges: autonomous agents, AI-driven optimization, LLM-assisted debugging.
- Strong communication skills: ability to present methodology decisions, risk assessments, and tape out readiness to senior management.
Desired Qualifications
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Benefits
- Qualcomm is an equal opportunity employer.
- Commitment to providing an accessible process for individuals with disabilities.
- Will provide reasonable accommodations to support individuals with disabilities.
- Commitment to making our workplace accessible for individuals with disabilities.
#ASIC design#physical design#FinFET#backend design#AI integration#EDA tools#automation#Python scripting#Tcl scripting#Shell scripting#tape out#place and route#STA#timing closure#power closure#sign-off#DVFS#multi-Vt#power domains#UPF#CPF
Company
Qualcomm
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Ho Chi Minh, Vietnam
Qualification
Bachelor, Master, Doctoral
Applicants
Be an early applicant