Staff SOC Physical Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
This Staff SOC Physical Design Engineer role involves leading and performing complex physical design flows for high-speed DDR and graphics, focusing on power and performance optimization for SoC products. Responsibilities include floor planning, CTS, Place & Route, PDN, timing analysis, and physical verification, ensuring signoff closure for tapeout.
Responsibilities
- Lead, plan, and synthesize ambiguous or conflicting requirements for the Physical Design Flow of high-speed DDR, graphics, physical verification flows, micro-architecture, SOC algorithm design and modeling, and methodology.
- Focus on target power utilization and optimization for system-on-chip (SoC) products and how these features impact power and performance.
- Perform Floor Planning, Clock Tree Synthesis, Place and Route, PDN, and Timing analysis and closure.
- Conduct various physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield) at the chip and block levels.
- Provide schedules and support cross-functional engineering efforts to drive to signoff closure for tapeout.
- Act as a strong contributor at design reviews and project meetings.
- Communicate and implement a development plan.
Requirements
- Master's Degree (or foreign academic equivalent) in Electrical Engineering, Computer Engineering, Computer Science or related degree field.
- Three (3) years of experience in a related occupation.
- Experience in high-speed DDR, graphics, physical verification flows, micro-architecture, SOC algorithm design and modeling, and methodology.
- Experience with Floor Planning, Clock Tree Synthesis, Place and Route, PDN, Timing analysis and closure.
- Experience with physical verification checks (LVS, DRC, design-for-manufacturing & design-for-yield).
Benefits
- Pay Range: $152,360.00 - $210,000.00/year
- Qualcomm is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
#SOC#Physical Design#ASICS Engineering#DDR#Graphics#Micro-architecture#Algorithm Design#Methodology#Power Utilization#Optimization#SoC Products#Floor Planning#Clock Tree Synthesis#Place and Route#PDN#Timing Analysis#Physical Verification#LVS#DRC#Design-for-Manufacturing#Design-for-Yield#Chip Level#Block Level#Signoff Closure#Tapeout#Design Reviews#Project Meetings#Development Plan