Staff Digital Verification Engineer GPU Hardware Design

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

Qualcomm is seeking an experienced Staff Digital Verification Engineer for their GPU Hardware Design team in Greece. This role involves leading verification strategy and execution for complex GPU and SoC hardware, requiring expertise in SystemVerilog and UVM. The position offers technical ownership and collaboration with cross-functional teams on advanced GPU technologies.

Responsibilities

Own and drive the verification strategy for complex GPU, CPU, SoC, or other high-performance hardware blocks from planning through sign-off.
Define verification plans, test strategies, milestones, quality criteria, and measurable coverage goals in collaboration with architecture and design teams.
Architect, develop, and maintain scalable SystemVerilog/UVM environments, including agents, drivers, monitors, scoreboards, predictors, reference models, and functional coverage.
Lead constrained-random, directed, assertion-based, formal-assisted, emulation, and post-silicon verification activities as appropriate.
Develop verification methodologies that provide effective checking of control logic, datapaths, pipelines, interfaces, memory transactions, and corner-case behavior.
Drive debug of complex failures across simulation, regressions, emulation, and silicon, identifying root causes and coordinating corrective actions.
Establish coverage closure strategies and review functional, code, assertion, and scenario coverage to ensure verification completeness.
Mentor verification engineers, conduct design and code reviews, and raise the technical capability of the broader DV team.
Influence architecture and microarchitecture by identifying verification risks, improving observability, and recommending design-for-verification features.
Collaborate with RTL, architecture, performance, power, physical design, software, and system teams to resolve issues and deliver high-quality hardware.
Contribute to verification infrastructure, regression automation, reusable VIP, checkers, methodologies, and productivity improvements.
Represent the verification team in technical reviews and provide clear status, risk, and sign-off recommendations to project leadership.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Typically 8+ years of relevant experience in digital design verification, with demonstrated technical leadership on complex projects.
Deep hands-on experience with SystemVerilog and UVM-based verification environments.
Strong understanding of digital verification methodology, including verification planning, constrained-random testing, assertions, scoreboards, reference models, coverage, regression, and debug.
Proven experience owning verification of complex IP, subsystems, or SoC components through coverage closure and sign-off.
Strong knowledge of verification planning and metric-driven verification processes.
Experience with protocol verification and transaction-level checking; knowledge of AMBA protocols such as AXI and AHB is highly desirable.
Experience developing reference models in C/C++, Python, or another high-level language.
Experience with simulators, waveform/debug tools, regression systems, and common RTL quality flows.
Strong analytical, debugging, communication, and collaboration skills.
Ability to work independently, influence technical decisions, and deliver results in a fast-paced, multi-disciplinary environment.

Desired Qualifications

Prior verification experience with CPU or GPU architectures.
Prior work on memory controller designs, memory subsystems, or high-bandwidth data movement is a significant advantage.
Prior experience verifying DMA engines, interconnects, caches, coherency, or complex data-path architectures.
Experience with UVM register models, protocol VIP, assertion-based verification, formal verification, emulation, or FPGA prototyping.
Knowledge of microprocessor architecture, GPU pipelines, memory hierarchies, arbitration, cache behavior, or performance validation.
Experience with verification planning and reporting tools, coverage databases, and large-scale regression infrastructure.
Experience driving cross-functional technical initiatives and mentoring engineers across locations.

Benefits

The opportunity to work on advanced GPU and SoC technologies.
Technical ownership across the complete digital verification lifecycle.
Collaboration with experienced architects, RTL designers, verification engineers, and software teams.
A technically challenging and inclusive engineering environment.
Opportunities to influence verification methodology, infrastructure, and product quality.
Professional growth through technical leadership, mentoring, and cross-functional collaboration.
Competitive annual discretionary bonus program.
Opportunity for annual RSU grants.
Highly competitive benefits package designed to support your success at work, at home, and at play.

Skills

SystemVerilogUVMAXIAHBC++Python

#GPU#Hardware Design#Digital Verification#ASICS#SoC

About Qualcomm

Enabling a world where everyone and everything can be intelligently connected.

Enabling a world where everyone and everything can be intelligently connected.\n\n

See all open jobs at Qualcomm Read more about Qualcomm Website

Company

Qualcomm

Job Posted

5 hours ago

Employment Type

Full Time

Work mode

On Site

Salary

€50,400 – €76,800 / year

Experience Level

Mid-Senior

Locations

Athens, Greece

Patra, Greece

Marousi, Greece

Qualification

Bachelor, Master, Doctoral

Applicants

Be an early applicant

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