Senior/Principal Interface IP Verification Engineer (Pre-Silicon) - 18386
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is hiring a Senior/Principal Interface IP Verification Engineer in Austin, Texas, to own the verification of complex Interface IP solutions like PCIe, CXL, DDR, and Ethernet. This role involves architecting UVM-based environments, developing test plans, and ensuring functional coverage closure for foundational building blocks of AI accelerators and data centers.
Responsibilities
- Own verification of complex Interface IP solutions, including PCIe, CXL, DDR, and Ethernet technologies.
- Architect, develop, and enhance scalable UVM-based verification environments and reusable verification IP.
- Define verification strategies and test plans from specification review through product release.
- Develop constrained-random, coverage-driven verification solutions using SystemVerilog and UVM.
- Drive functional coverage closure and verification signoff activities.
- Debug challenging RTL, protocol, and system-level issues while improving verification efficiency and automation.
- Partner closely with architecture, RTL, firmware, and systems teams to identify issues early and ensure robust product quality.
- Mentor engineers contributing to verification methodology improvements across the organization.
Requirements
- BSEE with at least 8 to 10+ years of direct industry experience with proven experience verifying complex ASIC or SoC designs.
- Deep expertise with SystemVerilog and UVM methodologies.
- Strong protocol knowledge in one or more of the following areas: PCIe, CXL, DDR Memory Interfaces, Ethernet.
- Experience developing constrained-random and coverage-driven verification environments.
- Strong debugging and problem-solving skills spanning RTL, verification, and protocol compliance.
- Experience with industry-standard simulators such as VCS, ModelSim, or similar tools.
- Ability to independently drive technical initiatives while collaborating across geographically distributed teams.
Desired Qualifications
- Experience with verification IP development.
- Experience with assertion-based verification.
- Experience with formal methodologies.
- Knowledge of modern SoC architectures and high-speed communication interfaces.
Benefits
- Competitive salaries.
- Eligible for an annual bonus, equity, and other discretionary bonuses.
- Comprehensive health, wellness, and financial benefits.
- Medical and healthcare plans.
- ETO and FTO Programs.
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance.
- ESPP: Purchase Synopsys common stock at a 15% discount.
- Retirement Plans.
#hardware engineering#asic verification#interface ip#pcie#cxl#ddr#ethernet#systemverilog#uvm#pre-silicon verification#soc designs
Company
Synopsys Inc
Job Posted
1 month ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Senior
Locations
Austin, United States
Qualification
Bachelor
Applicants
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