Senior Silicon Physical Design Engineer, Google Cloud
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Senior Silicon Physical Design Engineer sought for Google Cloud in Bengaluru, India. This role involves driving physical design methodologies, managing timing and power, and contributing to cutting-edge silicon solutions for Google's products. Requires a Bachelor's degree and 8 years of relevant experience.
Responsibilities
- Define and drive the implementation of physical design methodologies.
- Take ownership of one or more physical design partitions or top level.
- Manage timing and power consumption of the design.
- Contribute to design methodology, libraries, and code review.
- Define the physical design related rule sets for the functional design engineers.
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with advanced design, including clock/voltage domain crossing, design for testing (DFT), and low power designs.
- Experience with system on a chip (SoC) cycles.
- Experience in high-performance, high-frequency, and low-power designs.
Desired Qualifications
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in coding with System Verilog and scripting with TCL.
- Experience with layout verification and design rules.
- Experience with very large scale integration (VLSI) design in SoC or multiple-cycles of SoC in ASIC design.
Benefits
- Equity grants
- Opportunity to develop custom silicon solutions powering Google's direct-to-consumer products.
- Contribute to the innovation behind products loved by millions worldwide.
- Shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
#Silicon Physical Design#Google Cloud#Electrical Engineering#Computer Engineering#Computer Science#SoC#DFT#Low Power Design#VLSI#ASIC