Senior Designer

Technology, Data & Digital · Software & Web Development · Software Engineering

In short

HCLTech is seeking a Senior Designer in Bangalore, Karnataka with 3-6 years of experience. The role involves ASIC/SoC life cycle understanding, testplan and verification strategy documentation, and UVM-based testbench development using SystemVerilog and C. Responsibilities include functional coverage, assertions coding, Gate Level Simulation, and regression analysis.

Responsibilities

Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and UVM.
Develop TB components for SOC with C, SV.
Write, execute, and debug constrained-random and directed test cases.
Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics.
Debug complex simulation failures using waveform viewer tools.
Experience in SOC C based tests coding & debugging.
Experience in Gate level simulation & netlist debugging.
Experience in regression failure analysis.
Functional and Code Coverage closure.

Requirements

3 to 6 years' experience is mandatory.
Good understanding of ASIC/SoC life cycle.
Experience writing ASIC/SoC testplans.
Experience in writing verification strategy document.
Expertise & hands-on experience in OVM/UVM methodologies using SV.
Proficiency in Verilog, SystemVerilog, and core concepts of UVM.
Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.
Familiarity with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Siemens QuestaSim, Cadence Xcelium/Verdi).
Basic understanding of standard bus protocols like AMBA (AXI, AHB, APB) or peripheral protocols (SPI, I2C, PCIe).
Basic comfort working in a Linux environment and using scripting languages like Python, Tcl, or Perl for automation.

Benefits

Supercharge your potential.
Find your career.
Find your spark.
A place that knows that helping its customers stay on top starts by putting its people first.

Skills

VerilogSystemVerilogUVMOVMCPythonTclPerlAMBAAXIAHBAPBSPII2CPCIeLinuxSynopsys VCSSiemens QuestaSimCadence XceliumVerdi

#ASIC#SoC#verification#testbench#SystemVerilog#UVM#C#coverage#assertions#simulation#debugging#Gate Level Simulation#regression#Verilog#digital logic#FSM#FIFO#clocking#EDA tools#Protocols#AMBA#SPI#I2C#PCIe#Linux#scripting#Python#Tcl#Perl

About HCLTech

Supercharging progress through technology and innovation

HCLTech is a global technology company, home to 219,000+ people across 54 countries, delivering industry-leading capabilities centered around digital, engineering and cloud, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending September 2022 totaled $12.1 billion. To learn how we can supercharge progress for…

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